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Date:	Wed, 29 Oct 2014 11:31:03 +0100
From:	Steffen Trumtrar <s.trumtrar@...gutronix.de>
To:	Mark Brown <broonie@...nel.org>
Cc:	atull <atull@...nsource.altera.com>,
	jgunthorpe@...idianresearch.com, hpa@...or.com, monstr@...str.eu,
	michal.simek@...inx.com, rdunlap@...radead.org,
	gregkh@...uxfoundation.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, pantelis.antoniou@...sulko.com,
	robh+dt@...nel.org, grant.likely@...aro.org, iws@...o.caltech.edu,
	linux-doc@...r.kernel.org, pavel@...x.de, philip@...ister.org,
	rubini@...dd.com, jason@...edaemon.net, kyle.teske@...com,
	nico@...aro.org, balbi@...com, m.chehab@...sung.com,
	davidb@...eaurora.org, rob@...dley.net, davem@...emloft.net,
	cesarb@...arb.net, sameo@...ux.intel.com,
	akpm@...ux-foundation.org, linus.walleij@...aro.org,
	mgerlach@...nsource.altera.com, delicious.quinoa@...il.com,
	dinguyen@...nsource.altera.com, yvanderv@...nsource.altera.com
Subject: Re: [PATCH v2 2/3] ARM: dts: socfpga: fpga bridges bindings docs

On Wed, Oct 29, 2014 at 10:16:32AM +0000, Mark Brown wrote:
> On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
> 
> > So, that shouldn't be a problem though, as I already cooked up a driver for
> > the L3 with all the ranges specified. The only thing I need to figure out
> > before I will post it, is how to nicely handle the WO remap register.
> > I think regmap might be able to handle this itself, but am not sure yet.
> 
> It's supposed to be able to, not sure if anyone really tests that or not
> though so it's possible bugs crept in.  Most write only registers can
> physically be read so actually come out as volatile rather than write
> only even if functionally there is no reason to read.

Ah, I think you might be actually right there. IIRC it IS possible to read
from that register, but you only get 0s.
So, I shot myself in the knee with specifying that register as write-only
in my driver.

Thanks,
Steffen

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