linux-kernel - Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

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Message-ID: <5450C915.9030600@imgtec.com>
Date:	Wed, 29 Oct 2014 11:01:41 +0000
From:	Qais Yousef <qais.yousef@...tec.com>
To:	Andrew Bresticker <abrestic@...omium.org>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	"Thomas Gleixner" <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	"Daniel Lezcano" <daniel.lezcano@...aro.org>
CC:	John Crispin <blogic@...nwrt.org>,
	David Daney <ddaney.cavm@...il.com>,
	<linux-mips@...ux-mips.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
> +- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors
> +  to which the GIC may route interrupts.  May contain up to 6 entries, one
> +  for each of the CPU's hardware interrupt vectors.  Valid values are 2 - 7.
> +  This property is ignored if the CPU is started in EIC mode.
> +

Wouldn't it be better to have this in the reversed sense ie: 
mti,nonavailable-cpu-vectors? I think the assumption that by default 
they're all available unless something else is connected to them which 
is unlikely in most cases. It can be made optional property then.

I don't have a strong opinion about it though.

Qais
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