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Message-ID: <20141029144944.GA10491@debian-x64.ch.intel.com>
Date:	Wed, 29 Oct 2014 07:49:44 -0700
From:	Patrick Lu <patrick.lu@...el.com>
To:	Andi Kleen <andi@...stfloor.org>
Cc:	Alexei Starovoitov <alexei.starovoitov@...il.com>,
	Peter Zijlstra <peterz@...radead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...nel.org>,
	Stephane Eranian <eranian@...gle.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	"Yan, Zheng" <zheng.z.yan@...el.com>
Subject: Re: [PATCH 2/5] perf, x86, uncore: Add Haswell-EP uncore support

On Wed, Oct 29, 2014 at 04:11:15AM +0100, Andi Kleen wrote:
> > 
> > yes. removing line 'hswep_uncore_sbox' also worked as workaround.
> > You have an idea what's going on?
> 
> Not yet. I don't see it on my own systems, so it's something that's
> different on yours.
Hi Andi, I am experiencing the same crash using E5-2658v3 CPU in our lab in Chandler. I can
provide remote access for you to take a look.

Also, I used your ucevents.py to check out IRP counter, and it looks like
it's reporting half of what I'm expecting. Do you know if the script/PMU
program for both IRP0 and IRP1?

Patrick
> 
> > I suspect other folks will see the same crash when E5 v3
> > become more widespread.
> 
> I guess we can disable the sbox for now. 
> 
> -Andi
> > 
> 
> -- 
> ak@...ux.intel.com -- Speaking for myself only.
> --
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