linux-kernel - Re: Fwd: [PATCH] x86, MCE, AMD: save IA32_MCi_STATUS before machine_check

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Message-ID: <54510EFC.2080107@amd.com>
Date:	Wed, 29 Oct 2014 10:59:56 -0500
From:	Aravind Gopalakrishnan <aravind.gopalakrishnan@....com>
To:	Borislav Petkov <bp@...en8.de>
CC:	Chen Yucong <slaoub@...il.com>, Tony Luck <tony.luck@...el.com>,
	"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: Fwd: [PATCH] x86, MCE, AMD: save IA32_MCi_STATUS before machine_check_poll()
 resets it

On 10/22/2014 4:30 AM, Borislav Petkov wrote:
> Hi Aravind,
>
> question: what's the story with MC?_MISC[IntP], is that bit still there?
> Because I don't see it in my BKDGs here.

Yep, It exists.
Maybe you are referring to Fam15h M0h BKDG? I think the bit was 
introduced only from F15h M30h onwards.
The bit does *not* exist for bank=4, But-
if (bank ==4)
   return true;

takes care of that.

> The background of the story is
>
> https://lkml.org/lkml/2014/10/7/84
>
> There's this thing we did at the time
>
> f227d4306cf3 ("x86, MCE, AMD: Make APIC LVT thresholding interrupt optional")
>
> which, AFAICR, is about some F15h versions having a counter but *not*
> generating a thresholding interrupt. Can you confirm that is still
> the case and we can have a counter but no interrupt gets generated on
> overflow?
>

So yes, moving the assignment inside the if condition should work just fine.

I see the patch on your 'ras-for-3.19' branch does not have this, so 
I'll make this modification
to the branch before I test it.

Thanks,
-Aravind.
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