lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 29 Oct 2014 11:01:31 -0700
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Daniel Thompson <daniel.thompson@...aro.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>
CC:	David Brown <davidb@...eaurora.org>,
	Daniel Walker <dwalker@...o99.com>,
	Bryan Huntsman <bryanh@...eaurora.org>,
	Jiri Slaby <jslaby@...e.cz>, linux-arm-msm@...r.kernel.org,
	linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
	patches@...aro.org, linaro-kernel@...ts.linaro.org,
	John Stultz <john.stultz@...aro.org>,
	Sumit Semwal <sumit.semwal@...aro.org>
Subject: Re: [PATCH] serial: msm: Add magic SysRq support in dmmode

On 10/29/2014 09:38 AM, Daniel Thompson wrote:
> Currently the _dm RX handler detects breaks but does not pass any
> characters to uart_handle_sysrq_char().
>
> The _dm optimizations combined with the port's spin lock make if
> difficult to pass all characters to the sysrq logic because we cannot
> safely call uart_handle_sysrq_char() when the lock is held without
> deadlock (the console handler also takes the lock).
>
> Rather than passing all characters via uart_handle_sysrq_char() this patch
> only passes the last few characters in the FIFO. This should include all
> characters typed as a slow (human) rate. This makes the problem much
> simpler and allows us to move the handling of these characters outside
> of the port lock. This makes magic SysRq work if there is a human at
> the keyboard (or a short delay in a script).
>
> Signed-off-by: Daniel Thompson <daniel.thompson@...aro.org>
> ---

I have a patch that I was going to send for this (Frank R. and I have
been looking at it since a month or two ago). This patch doesn't look
correct given that the SR register is not actually accurate and doesn't
indicate that a break is there in the fifo. I'll Cc you on the patch,
please test it.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ