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Message-ID: <14243833.KJsSScVrGS@wuerfel>
Date: Thu, 30 Oct 2014 10:21:12 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Kevin Cernekee <cernekee@...il.com>
Cc: f.fainelli@...il.com, tglx@...utronix.de, jason@...edaemon.net,
ralf@...ux-mips.org, lethal@...ux-sh.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
mbizon@...ebox.fr, jogo@...nwrt.org, linux-mips@...ux-mips.org
Subject: Re: [PATCH V2 05/15] genirq: Generic chip: Add big endian I/O accessors
On Wednesday 29 October 2014 19:17:58 Kevin Cernekee wrote:
> static LIST_HEAD(gc_list);
> static DEFINE_RAW_SPINLOCK(gc_lock);
>
> +static int is_big_endian(struct irq_chip_generic *gc)
> +{
> + return !!(gc->domain->gc->gc_flags & IRQ_GC_BE_IO);
> +}
> +
> static void irq_reg_writel(struct irq_chip_generic *gc,
> u32 val, int reg_offset)
> {
> - writel(val, gc->reg_base + reg_offset);
> + if (is_big_endian(gc))
> + iowrite32be(val, gc->reg_base + reg_offset);
> + else
> + writel(val, gc->reg_base + reg_offset);
> }
>
What I had in mind was to use indirect function calls instead, like
#ifndef irq_reg_writel
static inline void irq_reg_writel_le(u32 val, void __iomem *addr)
{
return writel(val, addr);
}
#endif
#ifndef irq_reg_writel_be
static inline void irq_reg_writel_be(u32 val, void __iomem *addr)
{
return iowrite32_be(val, addr);
}
#endif
static inline void irq_reg_writel(struct irq_chip_generic *gc, u32 val, int reg_offset)
{
if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP) &&
!IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE))
return irq_reg_writel_le(val, gc->reg_base + reg_offset);
if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP) &&
!IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE))
return irq_reg_writel_be(val, gc->reg_base + reg_offset);
return gc->writel(val, gc->reg_base + reg_offset);
}
This would take the condition out of the callers.
Arnd
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