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Message-Id: <1414764033-30011-6-git-send-email-jgross@suse.com>
Date:	Fri, 31 Oct 2014 15:00:21 +0100
From:	Juergen Gross <jgross@...e.com>
To:	hpa@...or.com, x86@...nel.org, tglx@...utronix.de,
	mingo@...hat.com, stefan.bader@...onical.com,
	linux-kernel@...r.kernel.org, xen-devel@...ts.xensource.com,
	konrad.wilk@...cle.com, ville.syrjala@...ux.intel.com,
	david.vrabel@...rix.com, jbeulich@...e.com, toshi.kani@...com,
	plagnioj@...osoft.com, tomi.valkeinen@...com, bhelgaas@...gle.com
Cc:	Juergen Gross <jgross@...e.com>
Subject: [PATCH 05/17] x86: Use new cache mode type in arch/x86/pci

Instead of directly using the cache mode bits in the pte switch to
using the cache mode type.

Signed-off-by: Stefan Bader <stefan.bader@...onical.com>
Signed-off-by: Juergen Gross <jgross@...e.com>
---
 arch/x86/pci/i386.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 37c1435..9b18ef3 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -433,14 +433,14 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 		return -EINVAL;
 
 	if (pat_enabled && write_combine)
-		prot |= _PAGE_CACHE_WC;
+		prot |= cachemode2protval(_PAGE_CACHE_MODE_WC);
 	else if (pat_enabled || boot_cpu_data.x86 > 3)
 		/*
 		 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
 		 * To avoid attribute conflicts, request UC MINUS here
 		 * as well.
 		 */
-		prot |= _PAGE_CACHE_UC_MINUS;
+		prot |= cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);
 
 	vma->vm_page_prot = __pgprot(prot);
 
-- 
1.8.4.5

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