linux-kernel - [RFC][PATCH] x86 mpx: give bndX registers actual names

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Date:	Fri, 31 Oct 2014 14:22:37 -0700
From:	Dave Hansen <dave@...1.net>
To:	linux-kernel@...r.kernel.org
Cc:	Dave Hansen <dave@...1.net>, dave.hansen@...ux.intel.com,
	x86@...nel.org, hpa@...ux.intel.com, qiaowei.ren@...el.com,
	fenghua.yu@...el.com
Subject: [RFC][PATCH] x86 mpx: give bndX registers actual names

From: Dave Hansen <dave.hansen@...ux.intel.com>

Consider the bndX MPX registers.  There 4 registers each
containing a 64-bit lower and a 64-bit upper bound.  That's 8*64
bits and we declare it thusly:

	struct bndregs_struct {
		u64 bndregs[8];
	}

Let's say you want to read the upper bound from the MPX register
bnd2 out of the xsave buf.  You do:

	bndregno = 2;
	upper_bound = xsave_buf->bndregs.bndregs[2*bndregno+1];

That kinda sucks.  Every time you access it, you need to know:
1. Each bndX register is two entries wide in "bndregs"
2. The lower comes first followed by upper.  We do the +1 to get
   upper vs. lower.

This replaces the old definition.  You can now access them
indexed by the register number directly, and with a meaningful
name for the lower and upper bound:

	bndregno = 2;
	xsave_buf->bnd[bndregno].ub;

It's now *VERY* clear that there are 4 registers.  The programmer
now doesn't have to care what order the lower and upper bounds
are in, and it's harder to get it wrong.

The naming "lb" and "ub" reflects the names found in the Intel
SDM Extensions documentation of these registers.  I'm not married
to it.

Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: x86@...nel.org
Cc: "H. Peter Anvin" <hpa@...ux.intel.com>
Cc: Qiaowei Ren <qiaowei.ren@...el.com>
Cc: "Yu, Fenghua" <fenghua.yu@...el.com>

---

 b/arch/x86/include/asm/processor.h |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff -puN arch/x86/include/asm/processor.h~mpx-give-regsters-real-names arch/x86/include/asm/processor.h
--- a/arch/x86/include/asm/processor.h~mpx-give-regsters-real-names	2014-10-31 14:07:40.642004337 -0700
+++ b/arch/x86/include/asm/processor.h	2014-10-31 14:13:53.890456587 -0700
@@ -374,8 +374,9 @@ struct lwp_struct {
 	u8 reserved[128];
 };

-struct bndregs_struct {
-	u64 bndregs[8];
+struct bndreg_struct {
+	u64 lb; /* lower bound */
+	u64 ub; /* upper bound */
 } __packed;

 struct bndcsr_struct {
@@ -394,7 +395,7 @@ struct xsave_struct {
 	struct xsave_hdr_struct xsave_hdr;
 	struct ymmh_struct ymmh;
 	struct lwp_struct lwp;
-	struct bndregs_struct bndregs;
+	struct bndreg_struct bnd[4];
 	struct bndcsr_struct bndcsr;
 	/* new processor state extensions will go here */
 } __attribute__ ((packed, aligned (64)));
_
--
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