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Date:	Sat,  1 Nov 2014 18:03:55 -0700
From:	Kevin Cernekee <cernekee@...il.com>
To:	arnd@...db.de, f.fainelli@...il.com, tglx@...utronix.de,
	jason@...edaemon.net, ralf@...ux-mips.org
Cc:	linux-sh@...r.kernel.org, sergei.shtylyov@...entembedded.com,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	mbizon@...ebox.fr, jogo@...nwrt.org, linux-mips@...ux-mips.org
Subject: [PATCH V3 08/14] irqchip: bcm7120-l2: Make sure all register accesses use base+offset

A couple of accesses to IRQEN (base+0x00) just used "base" directly, so
they would break if IRQEN ever became nonzero.  Make sure that all
reads/writes specify the register offset constant.

Signed-off-by: Kevin Cernekee <cernekee@...il.com>
Acked-by: Florian Fainelli <f.fainelli@...il.com>
---
 drivers/irqchip/irq-bcm7120-l2.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index 7086fe0..22d3fa1 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -66,10 +66,10 @@ static void bcm7120_l2_intc_suspend(struct irq_data *d)
 
 	irq_gc_lock(gc);
 	/* Save the current mask and the interrupt forward mask */
-	b->saved_mask = __raw_readl(b->base) | b->irq_fwd_mask;
+	b->saved_mask = __raw_readl(b->base + IRQEN) | b->irq_fwd_mask;
 	if (b->can_wake) {
 		reg = b->saved_mask | gc->wake_active;
-		__raw_writel(reg, b->base);
+		__raw_writel(reg, b->base + IRQEN);
 	}
 	irq_gc_unlock(gc);
 }
@@ -81,7 +81,7 @@ static void bcm7120_l2_intc_resume(struct irq_data *d)
 
 	/* Restore the saved mask */
 	irq_gc_lock(gc);
-	__raw_writel(b->saved_mask, b->base);
+	__raw_writel(b->saved_mask, b->base + IRQEN);
 	irq_gc_unlock(gc);
 }
 
-- 
2.1.1

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