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Message-ID: <54575A68.7060009@nexus-software.ie>
Date:	Mon, 03 Nov 2014 10:35:20 +0000
From:	Bryan O'Donoghue <pure.logic@...us-software.ie>
To:	Raymond Tan <raymond.tan@...el.com>,
	Lee Jones <lee.jones@...aro.org>,
	Samuel Ortiz <sameo@...ux.intel.com>
CC:	linux-kernel@...r.kernel.org, Alvin Chen <alvin.chen@...el.com>,
	Andriy Shevchenko <andriy.shevchenko@...el.com>
Subject: Re: [PATCH 1/1] mfd: intel_quark_i2c_gpio: Add Intel Quark X1000
 I2C-GPIO MFD Driver

On 03/11/14 07:39, Raymond Tan wrote:
> +	pdata->properties->irq	= pdev->irq;
> +	pdata->properties->irq_shared	= true;

OK I see it.

Thanks.

My question is. How extensively have edge triggered interrupts been 
tested on the GPIO block ?

The BSP reference code is quite explicit about not missing edge interrupts.

Have you tested GPIO input in edge mode ?

+irqreturn_t intel_qrk_gpio_isr(int irq, void *dev_id)
+{
+	irqreturn_t ret = IRQ_NONE;
+	u32 pending = 0, gpio = 0;
+	void __iomem *reg_pending = reg_base + PORTA_INT_STATUS;
+	void __iomem *reg_eoi = reg_base + PORTA_INT_EOI;
+
+	/* Which pin (if any) triggered the interrupt */
+	while ((pending = ioread32(reg_pending))) {
+		/*
+		 * Acknowledge all the asserted GPIO interrupt lines before
+		 * serving them, so that we don't lose an edge.
+		 * This has only effect on edge-triggered interrupts.
+		 */
+		iowrite32(pending, reg_eoi);
+
+		/* Serve each asserted interrupt */
+		do {
+			gpio = __ffs(pending);
+			generic_handle_irq(
+				gpio_to_irq(INTEL_QRK_GIP_GPIO_BASE + gpio));
+			pending &= ~BIT(gpio);
+			ret = IRQ_HANDLED;
+		} while(pending);
+	}
+
+	return ret;
+}

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