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Message-Id: <1415074039-16590-6-git-send-email-wens@csie.org>
Date: Tue, 4 Nov 2014 12:07:18 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Maxime Ripard <maxime.ripard@...e-electrons.com>,
Kishon Vijay Abraham I <kishon@...com>,
Mike Turquette <mturquette@...aro.org>,
Grant Likely <grant.likely@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Cc: Chen-Yu Tsai <wens@...e.org>, Hans de Goede <hdegoede@...hat.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com
Subject: [PATCH 5/6] ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi
The A80 has 3 EHCI/OHCI USB controllers.
Signed-off-by: Chen-Yu Tsai <wens@...e.org>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 70 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 1a80e09..b6f344f 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -305,6 +305,28 @@
*/
ranges = <0 0 0 0x20000000>;
+ ehci0: usb@...00000 {
+ compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
+ reg = <0x00a00000 0x100>;
+ interrupts = <0 72 4>;
+ clocks = <&usb_mod_clk 1>;
+ resets = <&usb_mod_clk 17>;
+ phys = <&usbphy0>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci0: usb@...00400 {
+ compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
+ reg = <0x00a00400 0x100>;
+ interrupts = <0 73 4>;
+ clocks = <&usb_mod_clk 1>, <&usb_mod_clk 2>;
+ resets = <&usb_mod_clk 17>;
+ phys = <&usbphy0>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
usbphy0: phy@...00800 {
compatible = "allwinner,sun9i-a80-usb-phy";
reg = <0x00a00800 0x4>;
@@ -316,6 +338,32 @@
#phy-cells = <0>;
};
+ ehci1: usb@...01000 {
+ compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
+ reg = <0x00a01000 0x100>;
+ interrupts = <0 74 4>;
+ clocks = <&usb_mod_clk 3>;
+ resets = <&usb_mod_clk 18>;
+ phys = <&usbphy1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ /*
+ * Even though ohci1 exists, it is never used as
+ * usb1 only has HSIC pins routed externally
+ */
+ ohci1: usb@...01400 {
+ compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
+ reg = <0x00a01400 0x100>;
+ interrupts = <0 75 4>;
+ clocks = <&usb_mod_clk 3>, <&usb_mod_clk 4>;
+ resets = <&usb_mod_clk 18>;
+ phys = <&usbphy1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
usbphy1: phy@...01800 {
compatible = "allwinner,sun9i-a80-usb-phy";
reg = <0x00a01800 0x4>;
@@ -330,6 +378,28 @@
phy_type = "hsic";
};
+ ehci2: usb@...02000 {
+ compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
+ reg = <0x00a02000 0x100>;
+ interrupts = <0 76 4>;
+ clocks = <&usb_mod_clk 5>;
+ resets = <&usb_mod_clk 19>;
+ phys = <&usbphy2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci2: usb@...02400 {
+ compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
+ reg = <0x00a02400 0x100>;
+ interrupts = <0 77 4>;
+ clocks = <&usb_mod_clk 5>, <&usb_mod_clk 6>;
+ resets = <&usb_mod_clk 19>;
+ phys = <&usbphy2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
usbphy2: phy@...02800 {
compatible = "allwinner,sun9i-a80-usb-phy";
reg = <0x00a02800 0x4>;
--
2.1.1
--
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