linux-kernel - [PATCH 2/5] clk: divider: make clk_divider_recalc/set

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Message-Id: <1415087559-19444-3-git-send-email-kever.yang@rock-chips.com>
Date:	Tue,  4 Nov 2014 15:52:36 +0800
From:	Kever Yang <kever.yang@...k-chips.com>
To:	Mike Turquette <mturquette@...aro.org>,
	Heiko Stuebner <heiko@...ech.de>
Cc:	dianders@...omium.org, sonnyrao@...omium.org,
	addy.ke@...k-chips.com, cf@...k-chips.com, fzf@...k-chips.com,
	ykk@...k-chips.com, yzq@...k-chips.com, dkl@...k-chips.com,
	huangtao@...k-chips.com, Kever Yang <kever.yang@...k-chips.com>,
	linux-kernel@...r.kernel.org
Subject: [PATCH 2/5] clk: divider: make clk_divider_recalc/set_rate available

This patch makes these two function available for other file,
which may help to make costom usage of clock divider type.

Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
---

 drivers/clk/clk-divider.c    | 4 ++--
 include/linux/clk-provider.h | 4 ++++
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 18a9de2..f3f55a8 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -109,7 +109,7 @@ static unsigned int _get_val(struct clk_divider *divider, unsigned int div)
 	return div - 1;
 }
 
-static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
+unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
 		unsigned long parent_rate)
 {
 	struct clk_divider *divider = to_clk_divider(hw);
@@ -318,7 +318,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
 	return DIV_ROUND_UP(*prate, div);
 }
 
-static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
+int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
 				unsigned long parent_rate)
 {
 	struct clk_divider *divider = to_clk_divider(hw);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index be21af1..7947fe9 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -555,6 +555,10 @@ struct clk *__clk_lookup(const char *name);
 long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
 			      unsigned long *best_parent_rate,
 			      struct clk **best_parent_p);
+unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
+					unsigned long parent_rate);
+int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
+			 unsigned long parent_rate);
 
 /*
  * FIXME clock api without lock protection
-- 
1.9.1

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