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Message-ID: <20141104131714.GR3219@twins.programming.kicks-ass.net>
Date:	Tue, 4 Nov 2014 14:17:14 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Vikas Shivappa <vikas.shivappa@...el.com>
Cc:	Tejun Heo <tj@...nel.org>, "Auld, Will" <will.auld@...el.com>,
	Matt Fleming <matt@...sole-pimps.org>,
	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"Fleming, Matt" <matt.fleming@...el.com>, h.peter.anvin@...el.com
Subject: Re: Cache Allocation Technology Design

On Thu, Oct 30, 2014 at 04:18:33PM -0700, Vikas Shivappa wrote:
> One way to it is to merge the CAT cgroups into the cpuset . In essense there
> is no CAT cgroup seperately and we just have a new file 'cbm' in the cpuset.
> This would be visible only when system has Cache allocation support and the
> user can manipulate the cache bit mask here.
> The  user can use the already existing cpu_exclusive file in the cpuset to
> mark the cgroups to use exclusive CPUs.
> That way we simplify and reuse cpuset code/hierarchy .. ?

I don't like extending cpusets further. Its already a weird and too big
controller.

What is wrong with having a specific CQM controller and using it
together with cpusets where desired?
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