linux-kernel - Re: [PATCH v4 4/7] x86, mm, pat: Add pgprot

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Message-ID: <CALCETrWAU+mH0Ss7jgKXcoS=wVet5o=hP2iqz9H15+KSyq=Y-A@mail.gmail.com>
Date:	Tue, 4 Nov 2014 07:22:49 -0800
From:	Andy Lutomirski <luto@...capital.net>
To:	"Elliott, Robert (Server Storage)" <Elliott@...com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	"Kani, Toshimitsu" <toshi.kani@...com>,
	"hpa@...or.com" <hpa@...or.com>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
	"arnd@...db.de" <arnd@...db.de>,
	"linux-mm@...ck.org" <linux-mm@...ck.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"jgross@...e.com" <jgross@...e.com>,
	"stefan.bader@...onical.com" <stefan.bader@...onical.com>,
	"hmh@....eng.br" <hmh@....eng.br>,
	"yigal@...xistor.com" <yigal@...xistor.com>,
	"konrad.wilk@...cle.com" <konrad.wilk@...cle.com>
Subject: Re: [PATCH v4 4/7] x86, mm, pat: Add pgprot_writethrough() for WT

On Mon, Nov 3, 2014 at 7:34 PM, Elliott, Robert (Server Storage)
<Elliott@...com> wrote:
>
>
>> -----Original Message-----
>> From: Andy Lutomirski [mailto:luto@...capital.net]
>> Sent: Monday, November 03, 2014 5:01 PM
>> To: Thomas Gleixner
>> Cc: Kani, Toshimitsu; Elliott, Robert (Server Storage); hpa@...or.com;
>> mingo@...hat.com; akpm@...ux-foundation.org; arnd@...db.de; linux-
>> mm@...ck.org; linux-kernel@...r.kernel.org; jgross@...e.com;
>> stefan.bader@...onical.com; hmh@....eng.br; yigal@...xistor.com;
>> konrad.wilk@...cle.com
>> Subject: Re: [PATCH v4 4/7] x86, mm, pat: Add pgprot_writethrough() for
>> WT
>>
>> On Mon, Nov 3, 2014 at 2:53 PM, Thomas Gleixner <tglx@...utronix.de>
>> wrote:
> ...
>> On the other hand, I thought that _GPL was supposed to be more about
>> whether the thing using it is inherently a derived work of the Linux
>> kernel.  Since WT is an Intel concept, not a Linux concept, then I
>> think that this is a hard argument to make.
>
> IBM System/360 Model 85 (1968) had write-through (i.e., store-through)
> caching.  Intel might claim Write Combining, though.
>

Arguably WC is, and was, mostly a hack to enable full cacheline writes
without an instruction to do it directly.  x86 has such an instruction
now, so WC is less necessary.

In any event, my point wasn't that Intel should get any particular
credit here; it's that this is really a straightforward interface to
program a hardware feature that predates the interface.

--Andy
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