linux-kernel - Re: [PATCHv2 4/5] mmc: shdci-bcm2835: add verify for 32-bit back-to-back workaround

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Message-ID: <5459AECF.8000402@wwwdotorg.org>
Date:	Tue, 04 Nov 2014 21:59:59 -0700
From:	Stephen Warren <swarren@...dotorg.org>
To:	Scott Branden <sbranden@...adcom.com>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Russell King <rmk+kernel@....linux.org.uk>,
	Peter Griffin <peter.griffin@...aro.org>,
	Chris Ball <chris@...ntf.net>,
	Piotr Krol <pietrushnic@...il.com>
CC:	linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
	Joe Perches <joe@...ches.com>,
	linux-rpi-kernel@...ts.infradead.org, Ray Jui <rjui@...adcom.com>,
	bcm-kernel-feedback-list@...adcom.com
Subject: Re: [PATCHv2 4/5] mmc: shdci-bcm2835: add verify for 32-bit back-to-back
 workaround

On 10/30/2014 12:36 AM, Scott Branden wrote:
> Add a verify option to driver to print out an error message if a
> potential back to back write could cause a clock domain issue.

> index f8c450a..11af27f 100644

> +#ifdef CONFIG_MMC_SDHCI_BCM2835_VERIFY_WORKAROUND
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +	struct bcm2835_sdhci_host *bcm2835_host = pltfm_host->priv;
> +
> +	if (bcm2835_host->previous_reg == reg) {
> +		if ((reg != SDHCI_HOST_CONTROL)
> +			&& (reg != SDHCI_CLOCK_CONTROL)) {

The comment in patch 3 says the problem doesn't apply to the data
register. Why does this check for these two registers rather than data?

> +			dev_err(mmc_dev(host->mmc),
> +			"back-to-back write to 0x%x\n", reg);

The continuation line should be indented at least one more level here.
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