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Date:	Wed, 5 Nov 2014 09:15:28 -0800
From:	Andy Lutomirski <luto@...capital.net>
To:	Jan Beulich <jbeulich@...e.com>
Cc:	Ingo Molnar <mingo@...e.hu>, Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/2] x86-64: allow using RIP-relative addressing for
 per-CPU data

On Wed, Nov 5, 2014 at 9:09 AM, Jan Beulich <jbeulich@...e.com> wrote:
>>>> Andy Lutomirski <luto@...capital.net> 11/04/14 8:33 PM >>>
>>On 11/04/2014 12:49 AM, Jan Beulich wrote:
>>> Observing that per-CPU data (in the SMP case) is reachable by
>>> exploiting 64-bit address wraparound, these two patches
>>> arrange for using the one byte shorter RIP-relative addressing
>>> forms for the majority of per-CPU accesses.
>>>
>>> 1: handle PC-relative relocations on per-CPU data
>>> 2: use RIP-relative addressing for most per-CPU accesses
>>>
>>> Signed-off-by: Jan Beulich <jbeulich@...e.com>
>>>
>>
>>I'm lost here.  Can you give an example of a physical and virtual
>>address of an instruction, the address within the gs segment, and why
>>the relocations are backwards?
>
> When an instruction using RIP relative addressing gets moved up in
> address space, the distance to the target address decreases. I.e. it's the
> opposite of a normal, non-PC-relative base relocation (where the target
> address increases together with the instruction getting moved up).
>

Duh.  Thanks :)

--Andy
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