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Message-ID: <545AFE2C.5050105@wwwdotorg.org>
Date:	Wed, 05 Nov 2014 21:50:52 -0700
From:	Stephen Warren <swarren@...dotorg.org>
To:	Scott Branden <sbranden@...adcom.com>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Russell King <rmk+kernel@....linux.org.uk>,
	Peter Griffin <peter.griffin@...aro.org>,
	Chris Ball <chris@...ntf.net>,
	Piotr Krol <pietrushnic@...il.com>
CC:	linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
	Joe Perches <joe@...ches.com>,
	linux-rpi-kernel@...ts.infradead.org, Ray Jui <rjui@...adcom.com>,
	bcm-kernel-feedback-list@...adcom.com
Subject: Re: [PATCHv2 5/5] mmc: sdhci-bcm2835: add sdhci quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12

On 11/05/2014 12:02 AM, Scott Branden wrote:
> On 14-11-04 09:00 PM, Stephen Warren wrote:
>> On 10/30/2014 12:36 AM, Scott Branden wrote:
>>> SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 is missing and needed for this
>>> controller.
>>
>> This seems fine, although any explanation of why this quirk is needed
>> would be useful.
>>
> I don't know who to talk to at Arasan about this.  Will try hunting
> around a little for more info as to why this is needed to have eMMC and
> SD work properly through our internal testing on other non-2835 chipset
> that shares the same SDHCI controller as 2835.

I thought I heard that this wasn't a bug in the controller itself, but
rather an integration issue between the IP core and the register bus
it's attached to. Consequently, it may be SoC-specific or at least have
SoC-specific variations?
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