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Message-ID: <CAErSpo4JYzSQJQkRTaK-M18RVXaLKX-0yoAm853tu2NJypiL9g@mail.gmail.com>
Date: Wed, 5 Nov 2014 22:28:55 -0700
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: Jiang Liu <jiang.liu@...ux.intel.com>
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Randy Dunlap <rdunlap@...radead.org>,
Yinghai Lu <yinghai@...nel.org>,
Borislav Petkov <bp@...en8.de>,
Grant Likely <grant.likely@...aro.org>,
Marc Zyngier <marc.zyngier@....com>,
Yingjoe Chen <yingjoe.chen@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Yijing Wang <wangyijing@...wei.com>,
Alexander Gordeev <agordeev@...hat.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Tony Luck <tony.luck@...el.com>,
Joerg Roedel <joro@...tes.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
linux-arm <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [Patch Part2 v4 21/31] PCI/MSI: enhance PCI MSI core to support
hierarchy irqdomain
On Wed, Nov 5, 2014 at 9:58 PM, Jiang Liu <jiang.liu@...ux.intel.com> wrote:
> On 2014/11/6 7:09, Bjorn Helgaas wrote:
>> On Tue, Nov 04, 2014 at 08:01:55PM +0800, Jiang Liu wrote:
>>> +{
>>> + return (irq_hw_number_t)msidesc->msi_attrib.entry_nr |
>>> + PCI_DEVID(pdev->bus->number, pdev->devfn) << 11 |
>>> + (pci_domain_nr(pdev->bus) & 0xFFFFFFFF) << 27;
>>
>> Where does this bit layout come from? Is this defined in the spec
>> somewhere? A reference would help.
> We need a unique number to identify every possible MSI source,
> and this ID number is only used within the irqdomain subsystem.
> So we used above algorithm to generate the ID number, there's
> no specification for it.
A comment to that effect would be great.
Bjorn
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