linux-kernel - Re: [PATCH v2 0/2] pinctrl: Intel Cherryview/Braswell support

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Message-ID: <545BB76B.3070109@codeaurora.org>
Date:	Thu, 06 Nov 2014 12:01:15 -0600
From:	Timur Tabi <timur@...eaurora.org>
To:	Grant Likely <grant.likely@...retlab.ca>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>
CC:	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Alexandre Courbot <gnurou@...il.com>,
	Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
	Mathias Nyman <mathias.nyman@...ux.intel.com>,
	Ning Li <ning.li@...el.com>, Alan Cox <alan@...ux.intel.com>,
	lkml <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 0/2] pinctrl: Intel Cherryview/Braswell support

On 11/06/2014 11:37 AM, Grant Likely wrote:
> 2) Where direct control over the pinctrl hardware is required by the
> OS, build it into the GPIO driver functionality (which from what I
> understand is exactly what Mika has done).

So you're saying that if the GPIO driver is asked to read/write data to 
GPIO #35, then the driver should first make sure that the pin #35 is 
configured for GPIO?  What if that pin is configured for I2C instead, 
and now some random driver, is asking to read from GPIO #35, has now 
broken I2C?

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Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
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