linux-kernel - Re: [PATCH 3/5] lib: lockless generic and arch independent page table (gpt) v2.

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Message-ID: <545BF6E0.8060001@redhat.com>
Date:	Thu, 06 Nov 2014 17:32:00 -0500
From:	Rik van Riel <riel@...hat.com>
To:	j.glisse@...il.com, akpm@...ux-foundation.org
CC:	linux-kernel@...r.kernel.org, linux-mm@...ck.org,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	joro@...tes.org, Mel Gorman <mgorman@...e.de>,
	"H. Peter Anvin" <hpa@...or.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Andrea Arcangeli <aarcange@...hat.com>,
	Johannes Weiner <jweiner@...hat.com>,
	Larry Woodman <lwoodman@...hat.com>,
	Dave Airlie <airlied@...hat.com>,
	Brendan Conoboy <blc@...hat.com>,
	Joe Donohue <jdonohue@...hat.com>,
	Duncan Poole <dpoole@...dia.com>,
	Sherry Cheung <SCheung@...dia.com>,
	Subhash Gutti <sgutti@...dia.com>,
	John Hubbard <jhubbard@...dia.com>,
	Mark Hairgrove <mhairgrove@...dia.com>,
	Lucien Dunning <ldunning@...dia.com>,
	Cameron Buschardt <cabuschardt@...dia.com>,
	Arvind Gopalakrishnan <arvindg@...dia.com>,
	Shachar Raindel <raindel@...lanox.com>,
	Liran Liss <liranl@...lanox.com>,
	Roland Dreier <roland@...estorage.com>,
	Ben Sander <ben.sander@....com>,
	Greg Stoner <Greg.Stoner@....com>,
	John Bridgman <John.Bridgman@....com>,
	Michael Mantor <Michael.Mantor@....com>,
	Paul Blinzer <Paul.Blinzer@....com>,
	Laurent Morichetti <Laurent.Morichetti@....com>,
	Alexander Deucher <Alexander.Deucher@....com>,
	Oded Gabbay <Oded.Gabbay@....com>,
	Jérôme Glisse <jglisse@...hat.com>
Subject: Re: [PATCH 3/5] lib: lockless generic and arch independent page table
 (gpt) v2.

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On 11/03/2014 03:42 PM, j.glisse@...il.com wrote:
> From: Jérôme Glisse <jglisse@...hat.com>
> 
> Page table is a common structure format most notably use by cpu
> mmu. The arch depend page table code has strong tie to the
> architecture which makes it unsuitable to be use by other non arch
> specific code.
> 
> This patch implement a generic and arch independent page table. It
> is generic in the sense that entry size can be u64 or unsigned long
> (or u32 too on 32bits arch).
> 
> It is lockless in the sense that at any point in time you can have
> concurrent thread updating the page table (removing or changing
> entry) and faulting in the page table (adding new entry). This is
> achieve by enforcing each updater and each faulter to take a range
> lock. There is no exclusion on range lock, ie several thread can
> fault or update the same range concurrently and it is the
> responsability of the user to synchronize update to the page table
> entry (pte), update to the page table directory (pdp) is under gpt
> responsability.
> 
> API usage pattern is : gpt_init()
> 
> gpt_lock_update(lock_range) // User can update pte for instance by
> using atomic bit operation // allowing complete lockless update. 
> gpt_unlock_update(lock_range)
> 
> gpt_lock_fault(lock_range) // User can fault in pte but he is
> responsible for avoiding thread // to concurrently fault the same
> pte and for properly accounting // the number of pte faulted in the
> pdp structure. gpt_unlock_fault(lock_range) // The new faulted pte
> will only be visible to others updaters only // once all concurrent
> faulter on the address unlock.
> 
> Details on how the lockless concurrent updater and faulter works is
> provided in the header file.
> 
> Changed since v1: - Switch to macro implementation instead of using
> arithmetic to accomodate the various size for table entry
> (uint64_t, unsigned long, ...). This is somewhat less flexbile but
> right now there is no use for the extra flexibility v1 was
> offering.
> 
> Signed-off-by: Jérôme Glisse <jglisse@...hat.com>

Never a fan of preprocessor magic, but I  see why it's needed.

Acked-by: Rik van Riel <riel@...hat.com>


- -- 
All rights reversed
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