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Message-ID: <37D7C6CF3E00A74B8858931C1DB2F0770165E272@SHSMSX103.ccr.corp.intel.com>
Date:	Mon, 10 Nov 2014 13:54:03 +0000
From:	"Liang, Kan" <kan.liang@...el.com>
To:	Peter Zijlstra <peterz@...radead.org>
CC:	"eranian@...gle.com" <eranian@...gle.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"paulus@...ba.org" <paulus@...ba.org>,
	"acme@...nel.org" <acme@...nel.org>,
	"jolsa@...hat.com" <jolsa@...hat.com>,
	"ak@...ux.intel.com" <ak@...ux.intel.com>
Subject: RE: [PATCH V8 00/14] perf, x86: Haswell LBR call stack support
 (kernel)



> 
> On Thu, Nov 06, 2014 at 09:54:17AM -0500, Kan Liang wrote:
> > Yan, Zheng (13):
> >   perf, x86: Reduce lbr_sel_map size
> >   perf, core: introduce pmu context switch callback
> >   perf, x86: use context switch callback to flush LBR stack
> >   perf, x86: Basic Haswell LBR call stack support
> >   perf, core: pmu specific data for perf task context
> >   perf, core: always switch pmu specific data during context switch
> >   perf, x86: allocate space for storing LBR stack
> >   perf, x86: track number of events that use LBR callstack
> >   perf, x86: Save/resotre LBR stack during context switch
> >   perf, core: simplify need branch stack check
> >   perf, x86: re-organize code that implicitly enables LBR/PEBS
> >   perf, x86: disable FREEZE_LBRS_ON_PMI when LBR operates in callstack
> >       mode
> >   perf, x86: Discard zero length call entries in LBR call stack
> >
> > Peter Zijlstra (Intel) (1):
> >   perf, x86: expose LBR callstack to user space tool
> 
> So are these the exact same patches I already had, or did you change
> anything else? Its not immediately clear, lemme try and figure out.

Yes, Zheng's patches are exact same patches as you already had. I only
remove 11, 13,16, 17 from previous patch set and add your new patch (no
change). The significant changes are in user tool part, I sent them out as
a separate patch set.

Thanks,
Kan
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