linux-kernel - Re: [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20141111110308.5bf7bbef@bbrezillon>
Date:	Tue, 11 Nov 2014 11:03:08 +0100
From:	Boris Brezillon <boris.brezillon@...e-electrons.com>
To:	Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc:	Kevin Cernekee <cernekee@...il.com>,
	Kevin Hilman <khilman@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>, linux-sh@...r.kernel.org,
	Florian Fainelli <f.fainelli@...il.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Maxime Bizon <mbizon@...ebox.fr>,
	Jonas Gorski <jogo@...nwrt.org>,
	Linux MIPS Mailing List <linux-mips@...ux-mips.org>,
	nicolas.ferre@...el.com, Olof Johansson <olof@...om.net>,
	Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O
 accessors

Hi,

On Tue, 11 Nov 2014 00:03:01 +0100
Alexandre Belloni <alexandre.belloni@...e-electrons.com> wrote:

> Adding Boris in Cc: as he wrote that part.

Thanks for putting me in the loop.

> 
> On 10/11/2014 at 14:11:44 -0800, Kevin Cernekee wrote :
> > On Mon, Nov 10, 2014 at 2:00 PM, Kevin Hilman <khilman@...nel.org> wrote:
> > > Kevin Cernekee <cernekee@...il.com> writes:
> > >
> > >> Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
> > >> the irqchip.
> > >>
> > >> Signed-off-by: Kevin Cernekee <cernekee@...il.com>
> > >
> > > I bisected a couple ARM boot failures in next-20141110 on atmel sama5 platforms down to
> > > this patch, though I'm not quite yet sure how it's causing the failure.
> > > I'm not getting any console output, so haven't been able to dig deeper
> > > yet.  Maybe the atmel maintainers (Cc'd) can help dig.
> > >
> > > I've confirmed that reverting $SUBJECT patch (commit
> > > b79055952badbd73710685643bab44104f2509ea2) on top of next-20141110 gets
> > > things booting again.
> > >
> > > Also, it only happens with sama5_defconfig, not with multi_v7_defconfig.
> > 
> > In drivers/irqchip/irq-atmel-aic-common.c I see:
> > 
> >         ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
> >                                              handle_level_irq, 0, 0,
> >                                              IRQCHIP_SKIP_SET_WAKE);
> > 
> > and IRQCHIP_SKIP_SET_WAKE is (1 << 4), same as IRQ_GC_BE_IO.
> > 
> > Is it possible that the caller is passing values intended for
> > irq_chip->flags into a function expecting
> > irq_domain_chip_generic->gc_flags ?

Indeed, I don't know what I tried to do in the first place but this is
completely wrong.
First because the last argument is not a valid flag as you pointed out,
then because I clearly have set irq_set_wake and thus setting
IRQCHIP_SKIP_SET_WAKE makes no sense.

I also realized I should directly pass handle_fasteoi_irq and not
handle_level_irq for the handler, that clr flags (IRQ_NOREQUEST |
IRQ_NOPROBE | IRQ_NOAUTOEN) are missing and that IRQ_GC_INIT_MASK_CACHE
is missing too.

I'll propose a patch fixing all those bugs.

Sorry for the inconvenience :-(.

Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/