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Message-ID: <A765B125120D1346A63912DDE6D8B6315EBFB7@NTXXIAMBX02.xacn.micron.com>
Date:	Fri, 14 Nov 2014 02:06:04 +0000
From:	bpqw <bpqw@...ron.com>
To:	Graham Moore <grmoore@...nsource.altera.com>,
	Brian Norris <computersforpeace@...il.com>
CC:	Marek Vasut <marex@...x.de>,
	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	"geert+renesas@...der.be" <geert+renesas@...der.be>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	"shijie8@...il.com" <shijie8@...il.com>, bpqw <bpqw@...ron.com>
Subject: RE: [V5 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for
 Micron spi nor

>> This maybe your spi controller is still extended mode, Once EVCR bit 7 
>> is set to 0, the spi nor device will operate in quad I/O.Command-address-data line is 4-x-4.
>> So after send WRITE EVCR command , spi controller also  must transfer 
>> to quad I/O Mode,and set its Command-address-data line also Should be 4-x-4 .

>Thanks, this helped.  I added some code to snoop the command stream for WRITE EVCR with quad mode, 
>and then set up the quad mode in the controller.  Seems kinda ugly, but working now.

>-Graham

Yes ,if enable spi nor Quad I/O, firstly, must check spi controller if support Quad I/O protocol,
and after enable spi nor Quad I/O mode ,spi controller also must be transferred to Quad I/O protocol.
Their two side must be matched together.
Maybe spi controller can do this changes.

Hi,Brian

Can you give me some tips about this patch? Thanks!

-Bean Huo
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