lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 14 Nov 2014 09:58:12 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	"Wang, Yalin" <Yalin.Wang@...ymobile.com>
Cc:	'Will Deacon' <will.deacon@....com>,
	'Ard Biesheuvel' <ard.biesheuvel@...aro.org>,
	"'linux-kernel@...r.kernel.org'" <linux-kernel@...r.kernel.org>,
	"'akinobu.mita@...il.com'" <akinobu.mita@...il.com>,
	"'linux-mm@...ck.org'" <linux-mm@...ck.org>,
	'Joe Perches' <joe@...ches.com>,
	"'linux-arm-kernel@...ts.infradead.org'" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [RFC V6 2/3] arm:add bitrev.h file to support rbit instruction

On Fri, Nov 14, 2014 at 10:01:34AM +0800, Wang, Yalin wrote:
> > -----Original Message-----
> > From: Russell King - ARM Linux [mailto:linux@....linux.org.uk]
> > Sent: Friday, November 14, 2014 7:53 AM
> > To: Wang, Yalin
> > > On Fri, Oct 31, 2014 at 01:42:44PM +0800, Wang, Yalin wrote:
> > > This patch add bitrev.h file to support rbit instruction, so that we
> > > can do bitrev operation by hardware.
> > > Signed-off-by: Yalin Wang <yalin.wang@...ymobile.com>
> > > ---
> > >  arch/arm/Kconfig              |  1 +
> > >  arch/arm/include/asm/bitrev.h | 21 +++++++++++++++++++++
> > >  2 files changed, 22 insertions(+)
> > >  create mode 100644 arch/arm/include/asm/bitrev.h
> > >
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> > > 89c4b5c..be92b3b 100644
> > > --- a/arch/arm/Kconfig
> > > +++ b/arch/arm/Kconfig
> > > @@ -28,6 +28,7 @@ config ARM
> > >  	select HANDLE_DOMAIN_IRQ
> > >  	select HARDIRQS_SW_RESEND
> > >  	select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
> > > +	select HAVE_ARCH_BITREVERSE if (CPU_V7M || CPU_V7)
> > 
> > Looking at this, this is just wrong.  Take a moment to consider what
> > happens if we build a kernel which supports both ARMv6 _and_ ARMv7 CPUs.
> > What happens if an ARMv6 CPU tries to execute an rbit instruction?
> 
> Is it possible to build a kernel that support both CPU_V6 and CPU_V7?

Absolutely it is.

> I mean in Kconfig, CPU_V6 = y and CPU_V7 = y ?

Yes.

> If there is problem like you said,
> How about this solution:
> select HAVE_ARCH_BITREVERSE if ((CPU_V7M || CPU_V7) && !CPU_V6)  

That would work.

> For this patch,
> I just cherry-pick from Joe,
> If you are not responsible for this part,
> I will submit to the maintainers for these patches .
> Sorry for that .

I think you need to discuss with Joe how Joe would like his patches
handled.  However, it seems that Joe already sent his patches to the
appropriate maintainers, and they have been applying those patches
themselves.

Since your generic ARM changes depend on these patches being accepted
first, this means is that I can't apply the generic ARM changes until
those other patches have hit mainline, otherwise things are going to
break.  So, when you come to submit the latest set of patches to the
patch system, please do so only after these dependent patches have
been merged into mainline so that they don't get accidentally applied
before hand and break the two drivers that Joe mentioned.

Thanks.

-- 
FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up
according to speedtest.net.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists