Message-ID: <5465DB4F.7090402@rock-chips.com>
Date:	Fri, 14 Nov 2014 18:37:03 +0800
From:	Andy Yan <andy.yan@...k-chips.com>
To:	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@...tec.com>,
	airlied@...ux.ie, heiko@...ech.de, fabio.estevam@...escale.com,
	rmk+kernel@....linux.org.uk
CC:	Mark Rutland <mark.rutland@....com>,
	dri-devel@...ts.freedesktop.org, ykk@...k-chips.com,
	devel@...verdev.osuosl.org, Arnd Bergmann <arnd@...db.de>,
	linux-rockchip@...ts.infradead.org,
	Grant Likely <grant.likely@...aro.org>,
	Dave Airlie <airlied@...hat.com>, jay.xu@...k-chips.com,
	devicetree@...r.kernel.org, Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Inki Dae <inki.dae@...sung.com>,
	Rob Herring <robh+dt@...nel.org>,
	Sean Paul <seanpaul@...omium.org>, mark.yao@...k-chips.com,
	Josh Boyer <jwboyer@...hat.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	linux-kernel@...r.kernel.org, djkurtz@...gle.com,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Kumar Gala <galak@...eaurora.org>,
	Shawn Guo <shawn.guo@...aro.org>,
	Lucas Stach <l.stach@...gutronix.de>
Subject: Re: [PATCH v10 11/11] drm: bridge/dw_hdmi: add rockchip rk3288 support


On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote:
> Hi Andy
>
> On 14/11/14 03:31, Andy Yan wrote:
>> Rockchip RK3288 hdmi is compatible with dw_hdmi
>>
>> Signed-off-by: Andy Yan <andy.yan@...k-chips.com>
>>
>> ---
>>
>> Changes in v10:
>> - add more display mode support mpll configuration for rk3288
>>
>> Changes in v9:
>> - move some phy configuration to platform driver
>>
>> Changes in v8: None
>> Changes in v7: None
>> Changes in v6: None
>> Changes in v5: None
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>>
>>   drivers/gpu/drm/bridge/dw_hdmi.c            |  10 +
>>   drivers/gpu/drm/bridge/dw_hdmi.h            |   3 +-
>>   drivers/gpu/drm/rockchip/Kconfig            |  10 +
>>   drivers/gpu/drm/rockchip/Makefile           |   2 +-
>>   drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 355 ++++++++++++++++++++++++++++
>>   include/drm/bridge/dw_hdmi.h                |   1 +
>>   6 files changed, 379 insertions(+), 2 deletions(-)
>>   create mode 100644 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
>>
>> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
>> index a2876fe..1dd1f0b 100644
>> --- a/drivers/gpu/drm/bridge/dw_hdmi.c
>> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c
>> @@ -715,6 +715,13 @@ static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
>>   			 HDMI_PHY_CONF0_ENTMDS_MASK);
>>   }
>>   
>> +static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enable)
>> +{
>> +	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
>> +			 HDMI_PHY_CONF0_SPARECTRL_OFFSET,
>> +			 HDMI_PHY_CONF0_SPARECTRL_MASK);
>> +}
>> +
> What does enable spare do? Can other future SoCs use it?
>
> This looks like DW specific. And can be a separate commit that adds a feature to the dw hdmi driver.
   Actually I am not very clearly about this bit, but RK3288 HDMI will 
not work without this bit enable.
   On imx6, the description about this bit is:Reserved. Spare pin control.
   On rk3288, the description is: svsret/sparectrl
    Both are very simple.
> Thanks
> ZubairLK
>
>>   static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
>>   {
>>   	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
>> @@ -846,6 +853,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
>>   	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
>>   	dw_hdmi_phy_gen2_pddq(hdmi, 0);
>>   
>> +	if (hdmi->dev_type == RK3288_HDMI)
>> +		dw_hdmi_phy_enable_spare(hdmi, 1);
>> +
>>   	/*Wait for PHY PLL lock */
>>   	msec = 5;
>>   	do {
>> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h
>> index b8412a9..30a6b28 100644
>> --- a/drivers/gpu/drm/bridge/dw_hdmi.h
>> +++ b/drivers/gpu/drm/bridge/dw_hdmi.h
>> @@ -837,7 +837,8 @@ enum {
>>   	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
>>   	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
>>   	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
>> -	HDMI_PHY_CONF0_SPARECTRL = 0x20,
>> +	HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20,
>> +	HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5,
> Cheers,
> ZubairLK
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
>
>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists