linux-kernel - Re: [PATCH v4] bitops: Fix shift overflow in GENMASK macros

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Date:	Fri, 14 Nov 2014 23:03:40 +0300
From:	Max Filippov <jcmvbkbc@...il.com>
To:	Maxime Coquelin <maxime.coquelin@...com>
Cc:	Andrew Morton <akpm@...ux-foundation.org>,
	linux@...musvillemoes.dk, gong.chen@...ux.intel.com,
	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...nel.org>,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>, tytso@....edu,
	LKML <linux-kernel@...r.kernel.org>,
	"stable@...r.kernel.org" <stable@...r.kernel.org>,
	kernel@...inux.com, eric.paire@...com
Subject: Re: [PATCH v4] bitops: Fix shift overflow in GENMASK macros

Hi Maxime,

On Fri, Nov 14, 2014 at 5:07 PM, Maxime Coquelin <maxime.coquelin@...com> wrote:
> Looking at all GENMASK and GENMASK_ULL occurences in v3.18-rc4,
> I (only) found one possible candidate in drivers/spi/spi_xtensa-xtfpga.c:
>
> static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
>                 u32 v, u8 bits)
> {
>     struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
>
>     xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
> ...
> }
>
> Max F., can xtfpga_spi_txrx_word() be called with "bits" = 32?

No, bits should never be greater than 16, because spi_master sets its
bits_per_word_mask to SPI_BPW_RANGE_MASK(1, 16).

-- 
Thanks.
-- Max
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