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Message-ID: <1455255.dvOV4oYdNo@diego>
Date:	Sun, 16 Nov 2014 00:03:33 +0100
From:	Heiko Stübner <heiko@...ech.de>
To:	Kever Yang <kever.yang@...k-chips.com>
Cc:	Mike Turquette <mturquette@...aro.org>, dianders@...omium.org,
	sonnyrao@...omium.org, addy.ke@...k-chips.com, cf@...k-chips.com,
	dkl@...k-chips.com, huangtao@...k-chips.com,
	linux-rockchip@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: rockchip: fix clk_usbphy480m_gate bit location in register

Am Donnerstag, 13. November 2014, 15:19:21 schrieb Kever Yang:
> According to rk3288 trm, the clk_usbphy480m_gate is locate at
> bit 14 of CRU_CLKGATE5_CON register.
> 
> Signed-off-by: Kever Yang <kever.yang@...k-chips.com>

applied this to my clk branch.


Heiko
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