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Message-Id: <1416009604-31545-2-git-send-email-amstan@chromium.org>
Date: Fri, 14 Nov 2014 16:00:03 -0800
From: Alexandru M Stan <amstan@...omium.org>
To: Mike Turquette <mturquette@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Doug Anderson <dianders@...omium.org>,
addy ke <addy.ke@...k-chips.com>
Cc: Sonny Rao <sonnyrao@...omium.org>,
Kever Yang <kever.yang@...k-chips.com>,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
Alexandru M Stan <amstan@...omium.org>, robh+dt@...nel.org,
pawel.moll@....com, mark.rutland@....com,
ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
mark.yao@...k-chips.com, linux-kernel@...r.kernel.org
Subject: [PATCH v2 1/2] clk: rockchip: add bindings for the mmc clock phases
This will be used in a later patch for clock phase tuning.
Suggested-by: Heiko Stuebner <heiko@...ech.de>
Signed-off-by: Alexandru M Stan <amstan@...omium.org>
---
Changes in v2: None
include/dt-bindings/clock/rk3288-cru.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 100a08c..465d0f6 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -72,6 +72,16 @@
#define SCLK_HEVC_CABAC 111
#define SCLK_HEVC_CORE 112
+#define SCLK_SDMMC_DRV_PHASE 113
+#define SCLK_SDIO0_DRV_PHASE 114
+#define SCLK_SDIO1_DRV_PHASE 115
+#define SCLK_EMMC_DRV_PHASE 116
+
+#define SCLK_SDMMC_SAMPLE_PHASE 117
+#define SCLK_SDIO0_SAMPLE_PHASE 118
+#define SCLK_SDIO1_SAMPLE_PHASE 119
+#define SCLK_EMMC_SAMPLE_PHASE 120
+
#define DCLK_VOP0 190
#define DCLK_VOP1 191
--
2.1.0.rc2.206.gedb03e5
--
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