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Message-ID: <546A64A4.7060705@linaro.org>
Date:	Mon, 17 Nov 2014 22:12:04 +0100
From:	Daniel Lezcano <daniel.lezcano@...aro.org>
To:	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Jason Cooper <jason@...edaemon.net>,
	Andrew Lunn <andrew@...n.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
	Gregory Clement <gregory.clement@...e-electrons.com>
CC:	linux-arm-kernel@...ts.infradead.org,
	Tawfik Bayouk <tawfik@...vell.com>,
	Nadav Haklai <nadavh@...vell.com>,
	Lior Amsalem <alior@...vell.com>,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	devicetree@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCHv2 04/16] clocksource: time-armada-370-xp: add suspend/resume
 support

On 11/14/2014 04:21 PM, Thomas Petazzoni wrote:
> This commit adds a set of suspend/resume syscore_ops to respectively
> save and restore a number of timer registers, in order to make sure
> the clockevent and clocksource devices continue to work properly
> across a suspend/resume cycle.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
> Cc: Daniel Lezcano <daniel.lezcano@...aro.org>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: linux-kernel@...r.kernel.org

Acked-by: Daniel Lezcano <daniel.lezcano@...aro.org>


> ---
>   drivers/clocksource/time-armada-370-xp.c | 25 +++++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
>
> diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
> index 0451e62..ff37d3a 100644
> --- a/drivers/clocksource/time-armada-370-xp.c
> +++ b/drivers/clocksource/time-armada-370-xp.c
> @@ -43,6 +43,7 @@
>   #include <linux/module.h>
>   #include <linux/sched_clock.h>
>   #include <linux/percpu.h>
> +#include <linux/syscore_ops.h>
>
>   /*
>    * Timer block registers.
> @@ -223,6 +224,28 @@ static struct notifier_block armada_370_xp_timer_cpu_nb = {
>   	.notifier_call = armada_370_xp_timer_cpu_notify,
>   };
>
> +static u32 timer0_ctrl_reg, timer0_local_ctrl_reg;
> +
> +static int armada_370_xp_timer_suspend(void)
> +{
> +	timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF);
> +	timer0_local_ctrl_reg = readl(local_base + TIMER_CTRL_OFF);
> +	return 0;
> +}
> +
> +static void armada_370_xp_timer_resume(void)
> +{
> +	writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
> +	writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
> +	writel(timer0_ctrl_reg, timer_base + TIMER_CTRL_OFF);
> +	writel(timer0_local_ctrl_reg, local_base + TIMER_CTRL_OFF);
> +}
> +
> +struct syscore_ops armada_370_xp_timer_syscore_ops = {
> +	.suspend	= armada_370_xp_timer_suspend,
> +	.resume		= armada_370_xp_timer_resume,
> +};
> +
>   static void __init armada_370_xp_timer_common_init(struct device_node *np)
>   {
>   	u32 clr = 0, set = 0;
> @@ -285,6 +308,8 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
>   	/* Immediately configure the timer on the boot CPU */
>   	if (!res)
>   		armada_370_xp_timer_setup(this_cpu_ptr(armada_370_xp_evt));
> +
> +	register_syscore_ops(&armada_370_xp_timer_syscore_ops);
>   }
>
>   static void __init armada_xp_timer_init(struct device_node *np)
>


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