linux-kernel - [tip:x86/mpx] x86: mpx: Give bndX registers actual names

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Message-ID: <tip-c04e051cccd2446d9ca373628d14b7e732462f5d@git.kernel.org>
Date:	Mon, 17 Nov 2014 16:04:52 -0800
From:	tip-bot for Dave Hansen <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	hpa@...or.com, linux-kernel@...r.kernel.org, dave@...1.net,
	qiaowei.ren@...el.com, fenghua.yu@...el.com,
	dave.hansen@...ux.intel.com, mingo@...nel.org, hpa@...ux.intel.com,
	tglx@...utronix.de
Subject: [tip:x86/mpx] x86: mpx: Give bndX registers actual names

Commit-ID:  c04e051cccd2446d9ca373628d14b7e732462f5d
Gitweb:     http://git.kernel.org/tip/c04e051cccd2446d9ca373628d14b7e732462f5d
Author:     Dave Hansen <dave.hansen@...ux.intel.com>
AuthorDate: Fri, 31 Oct 2014 14:58:20 -0700
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Tue, 18 Nov 2014 00:58:52 +0100

x86: mpx: Give bndX registers actual names

Consider the bndX MPX registers.  There 4 registers each
containing a 64-bit lower and a 64-bit upper bound.  That's 8*64
bits and we declare it thusly:

	struct bndregs_struct {
		u64 bndregs[8];
	}
    
Let's say you want to read the upper bound from the MPX register
bnd2 out of the xsave buf.  You do:

	bndregno = 2;
	upper_bound = xsave_buf->bndregs.bndregs[2*bndregno+1];

That kinda sucks.  Every time you access it, you need to know:
1. Each bndX register is two entries wide in "bndregs"
2. The lower comes first followed by upper.  We do the +1 to get
   upper vs. lower.

This replaces the old definition.  You can now access them
indexed by the register number directly, and with a meaningful
name for the lower and upper bound:

	bndregno = 2;
	xsave_buf->bndreg[bndregno].upper_bound;

It's now *VERY* clear that there are 4 registers.  The programmer
now doesn't have to care what order the lower and upper bounds
are in, and it's harder to get it wrong.

[ tglx: Changed ub/lb to upper_bound/lower_bound and renamed struct
bndreg_struct to struct bndreg ]

Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: x86@...nel.org
Cc: "H. Peter Anvin" <hpa@...ux.intel.com>
Cc: Qiaowei Ren <qiaowei.ren@...el.com>
Cc: "Yu, Fenghua" <fenghua.yu@...el.com>
Cc: Dave Hansen <dave@...1.net>
Link: http://lkml.kernel.org/r/20141031215820.5EA5E0EC@viggo.jf.intel.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 arch/x86/include/asm/processor.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index eb71ec7..0f2263a 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -374,8 +374,9 @@ struct lwp_struct {
 	u8 reserved[128];
 };
 
-struct bndregs_struct {
-	u64 bndregs[8];
+struct bndreg {
+	u64 lower_bound;
+	u64 upper_bound;
 } __packed;
 
 struct bndcsr_struct {
@@ -394,7 +395,7 @@ struct xsave_struct {
 	struct xsave_hdr_struct xsave_hdr;
 	struct ymmh_struct ymmh;
 	struct lwp_struct lwp;
-	struct bndregs_struct bndregs;
+	struct bndreg bndreg[4];
 	struct bndcsr_struct bndcsr;
 	/* new processor state extensions will go here */
 } __attribute__ ((packed, aligned (64)));
--
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