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Message-ID: <546B9FD1.6040801@gmail.com>
Date: Tue, 18 Nov 2014 20:36:49 +0100
From: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To: Antoine Tenart <antoine.tenart@...e-electrons.com>,
Peter.Chen@...escale.com, balbi@...com, p.zabel@...gutronix.de
CC: alexandre.belloni@...e-electrons.com,
thomas.petazzoni@...e-electrons.com, zmxu@...vell.com,
jszhang@...vell.com, michal.simek@...inx.com,
linux-arm-kernel@...ts.infradead.org, linux-usb@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v8 10/13] ARM: dts: berlin: add BG2Q nodes for USB support
On 17.11.2014 14:35, Antoine Tenart wrote:
> Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
> SoC has 3 USB host controller, compatible with ChipIdea.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@...e-electrons.com>
Applied to berlin/dt with the whitespace removed that Sergei pointed
out.
Thanks!
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 2de8d6f8973c..834142bdfbb1 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -114,6 +114,40 @@
> #interrupt-cells = <3>;
> };
>
> + usb_phy2: phy@...400 {
> + compatible = "marvell,berlin2-usb-phy";
> + reg = <0xa2f400 0x128>;
> + #phy-cells = <0>;
> + resets = <&chip 0x104 14>;
> + status = "disabled";
> + };
> +
> + usb2: usb@...000 {
> + compatible = "chipidea,usb2";
> + reg = <0xa30000 0x10000>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_USB2>;
> + phys = <&usb_phy2>;
> + phy-names = "usb-phy";
> + status = "disabled";
> + };
> +
> + usb_phy0: phy@...000 {
> + compatible = "marvell,berlin2-usb-phy";
> + reg = <0xb74000 0x128>;
> + #phy-cells = <0>;
> + resets = <&chip 0x104 12>;
> + status = "disabled";
> + };
> +
> + usb_phy1: phy@...000 {
> + compatible = "marvell,berlin2-usb-phy";
> + reg = <0xb78000 0x128>;
> + #phy-cells = <0>;
> + resets = <&chip 0x104 13>;
> + status = "disabled";
> + };
> +
> eth0: ethernet@...000 {
> compatible = "marvell,pxa168-eth";
> reg = <0xb90000 0x10000>;
> @@ -365,6 +399,26 @@
> };
> };
>
> + usb0: usb@...000 {
> + compatible = "chipidea,usb2";
> + reg = <0xed0000 0x10000>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_USB0>;
> + phys = <&usb_phy0>;
> + phy-names = "usb-phy";
> + status = "disabled";
> + };
> +
> + usb1: usb@...000 {
> + compatible = "chipidea,usb2";
> + reg = <0xee0000 0x10000>;
> + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&chip CLKID_USB1>;
> + phys = <&usb_phy1>;
> + phy-names = "usb-phy";
> + status = "disabled";
> + };
> +
> apb@...000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> @@ -457,5 +511,6 @@
> interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
> };
> };
> +
> };
> };
>
--
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