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Message-Id: <1416442245-21967-8-git-send-email-sboyd@codeaurora.org>
Date: Wed, 19 Nov 2014 16:10:45 -0800
From: Stephen Boyd <sboyd@...eaurora.org>
To: Mike Turquette <mturquette@...aro.org>
Cc: Rajendra Nayak <rnayak@...eaurora.org>,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Kenneth Westfield <kwestfie@...eaurora.org>,
Josh Cartwright <joshc@...eaurora.org>,
Kumar Gala <galak@...eaurora.org>, <devicetree@...r.kernel.org>
Subject: [PATCH 7/7] devicetree: bindings: Document qcom,lcc
From: Rajendra Nayak <rnayak@...eaurora.org>
Document the LPASS (low power audio subsystem) clock controller
found on Qualcomm devices.
Cc: <devicetree@...r.kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
Signed-off-by: Kumar Gala <galak@...eaurora.org>
Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
---
.../devicetree/bindings/clock/qcom,lcc.txt | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,lcc.txt
diff --git a/Documentation/devicetree/bindings/clock/qcom,lcc.txt b/Documentation/devicetree/bindings/clock/qcom,lcc.txt
new file mode 100644
index 000000000000..734e5766ca4a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,lcc.txt
@@ -0,0 +1,21 @@
+Qualcomm LPASS Clock & Reset Controller Binding
+------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+
+ "qcom,lcc-msm8960"
+ "qcom,lcc-apq8064"
+ "qcom,lcc-ipq8064"
+
+- reg : shall contain base register location and length
+- #clock-cells : shall contain 1
+- #reset-cells : shall contain 1
+
+Example:
+ clock-controller@...000 {
+ compatible = "qcom,lcc-ipq8064";
+ reg = <0x28000000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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