linux-kernel - Re: [PATCH V2 00/22] Multiplatform BMIPS kernel

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Message-ID: <CAJiQ=7C8h-MAuRdgzZqx2=bg8bvy7v9pv7e7tGXWmA9ghYJiqQ@mail.gmail.com>
Date:	Wed, 19 Nov 2014 19:55:15 -0800
From:	Kevin Cernekee <cernekee@...il.com>
To:	Brian Norris <computersforpeace@...il.com>
Cc:	Ralf Baechle <ralf@...ux-mips.org>,
	Florian Fainelli <f.fainelli@...il.com>,
	Jon Fraser <jfraser@...adcom.com>,
	Dmitry Torokhov <dtor@...omium.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Linux MIPS Mailing List <linux-mips@...ux-mips.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 00/22] Multiplatform BMIPS kernel

On Wed, Nov 19, 2014 at 7:04 PM, Brian Norris
<computersforpeace@...il.com> wrote:
> On Sat, Nov 15, 2014 at 04:17:24PM -0800, Kevin Cernekee wrote:
>> The lack of a reboot handler is annoying; syscon-reboot probably won't work
>> on STB (because it requires two writes).
>
> Can't you reuse drivers/power/reset/brcmstb-reboot.c ?

Oops, I ran a quick check earlier by grepping for "sun-top-ctrl" and
looking under drivers/reset, but assumed this driver wasn't merged yet
when nothing came up in the code.  Thanks for the pointer.

It looks like the current driver will work for 40nm, but 65nm uses
different bit positions: RESET_CTRL bit 3 to arm, and SW_RESET bit 31
to trigger.  I'll add a new "brcm,brcmstb-reboot-65nm" compatible
string to make this work.

Also, we'll need to take Guenter Roeck's register_restart_handler()
patch in order to build on MIPS.
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