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Message-ID: <D0955C2B.9B22%suravee.suthikulpanit@amd.com>
Date:	Fri, 21 Nov 2014 14:40:14 +0000
From:	"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@....com>
To:	Marc Zyngier <marc.zyngier@....com>,
	Mark Rutland <Mark.Rutland@....com>,
	Will Deacon <Will.Deacon@....com>,
	Catalin Marinas <Catalin.Marinas@....com>
CC:	Liviu Dudau <Liviu.Dudau@....com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"Lendacky, Thomas" <Thomas.Lendacky@....com>,
	"Schopp, Joel" <Joel.Schopp@....com>
Subject: Re: [PATCH V3] arm64: amd-seattle: Adding device tree for AMD
 Seattle platform



On 11/21/14, 19:57, "Marc Zyngier" <marc.zyngier@....com> wrote:

>>+	gic: interrupt-controller@...01000 {
>>+		compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>+		interrupt-controller;
>>+		#interrupt-cells = <3>;
>>+		#address-cells = <2>;
>>+		#size-cells = <2>;
>>+		reg = <0x0 0xe1110000 0 0x1000>,
>>+		      <0x0 0xe112f000 0 0x2000>,
>>+		      <0x0 0xe1140000 0 0x10000>,
>>+		      <0x0 0xe1160000 0 0x10000>;
>>+		interrupts = <1 8 0xf04>;
>
>Are you sure about this one? ARM systems usually have this wired on PPI9
>(interrupt 25)...
>
>Thanks,
>
>	M.

I think you might be right. GIC-400 TRM says that this is should be 25,
and used 
for virtual maintenance interrupts. How can I verify this in Linux? KVM?

Thanks,

Suravee

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