linux-kernel - Re: [PATCH 01/11] pinctrl: exynos: Add BUS1 pin controller for exynos7

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Message-ID: <CAGOxZ53d_Vk1cF8Y2LNgMNeuCFeQJKmHQeN19pO5HfAdp4hx8A@mail.gmail.com>
Date:	Sat, 22 Nov 2014 19:07:35 +0530
From:	Alim Akhtar <alim.akhtar@...il.com>
To:	Vivek Gautam <gautam.vivek@...sung.com>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>, linux-usb@...r.kernel.org,
	devicetree@...r.kernel.org, balbi@...com, kishon@...com,
	linux-omap@...r.kernel.org, gregkh@...uxfoundation.org,
	Tomasz Figa <tomasz.figa@...il.com>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	robh+dt@...nel.org, stern@...land.harvard.edu,
	Kukjin Kim <kgene.kim@...sung.com>,
	Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [PATCH 01/11] pinctrl: exynos: Add BUS1 pin controller for exynos7

Hi Vivek,

On Fri, Nov 21, 2014 at 7:05 PM, Vivek Gautam <gautam.vivek@...sung.com> wrote:
> USB and Power regulator on Exynos7 require gpios available
> in BUS1 pin controller block.
> So adding the BUS1 pinctrl support.
>
> Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@...il.com>
> Signed-off-by: Vivek Gautam <gautam.vivek@...sung.com>
> Cc: Linus Walleij <linus.walleij@...aro.org>
> ---
>  drivers/pinctrl/samsung/pinctrl-exynos.c |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
> index d5d4cfc..caca5b5 100644
> --- a/drivers/pinctrl/samsung/pinctrl-exynos.c
> +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
> @@ -1300,6 +1300,13 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
>         EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
>  };
>
> +/* pin banks of exynos7 pin-controller - BUS1 */
> +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
> +       EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
> +       EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
> +       EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
> +};
> +
Looks like you are just trying to touch pin banks only related to USB
stuffs, but as this patch does not have any dependencies on other
patches in this series, will you consider adding other pin banks of
BUS1, just for completeness of BUS1 pin-controller.

>  const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
>         {
>                 /* pin-controller instance 0 Alive data */
> @@ -1342,5 +1349,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
>                 .pin_banks      = exynos7_pin_banks7,
>                 .nr_banks       = ARRAY_SIZE(exynos7_pin_banks7),
>                 .eint_gpio_init = exynos_eint_gpio_init,
> +       }, {
> +               /* pin-controller instance 8 BUS1 data */
> +               .pin_banks      = exynos7_pin_banks8,
> +               .nr_banks       = ARRAY_SIZE(exynos7_pin_banks8),
> +               .eint_gpio_init = exynos_eint_gpio_init,
>         },
>  };
> --
> 1.7.10.4
>
> --
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-- 
Regards,
Alim
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