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Date:	Tue, 25 Nov 2014 08:56:35 +0100
From:	Philipp Zabel <p.zabel@...gutronix.de>
To:	Mike Turquette <mturquette@...aro.org>
Cc:	Thierry Reding <thierry.reding@...il.com>,
	Janusz Użycki <j.uzycki@...roma.com.pl>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org
Subject: Re: [PATCH v2] clk: Add PWM clock driver

Hi Mike,

Am Montag, den 24.11.2014, 23:07 -0800 schrieb Mike Turquette:
> Quoting Philipp Zabel (2014-11-03 01:31:18)
> > Some board designers, when running out of clock output pads, decide to
> > (mis)use PWM output pads to provide a clock to external components.
> > This driver supports this practice by providing an adapter between the
> > PWM and clock bindings in the device tree. As the PWM bindings specify
> > the period in the device tree, this is a fixed clock.
> > 
> > Signed-off-by: Philipp Zabel <p.zabel@...gutronix.de>
> > ---
> > I'm resending this because last time the linux-pwm list was not in Cc:
> > So far I have not received any comments on the patch itself. I have used
> > it on a BoundaryDevices Nitrogen6X board to produce a master clock for
> > the OV5640 MIPI CSI-2 camera module.
> > 
> > Changes since v1:
> >  - none (rebased onto v3.18-rc3)
> 
> Hi Philipp,
> 
> Thanks for testing this. Is the Nitrogen6X board merged upstream? I'm OK
> with the patch but prefer to merge things when a consumer is ready to
> use it. I guess you are missing a patch to add the pwm-clock bits to the
> Nitrogen6X dts?

The Nitrogen6X board is merged upstream already, I used this dts patch
to register the clock:

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 7628049..e2e7a22 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -130,6 +130,18 @@
 		power-supply = <&reg_3p3v>;
 		status = "okay";
 	};
+
+	mipi_mclk: mipi-mclk {
+		compatible = "pwm-clock";
+		clock-output-names = "mipi-mclk";
+		/* Note: since the PWM reference clock is 66 MHz, the highest
+		 * possible frequency with 50% duty cycle smaller than 27 MHz
+		 * is 16.5 MHz: <&pwm3 0 61>;
+		 * But we can also do 22 MHz with 33% duty cycle:
+		 */
+		pwms = <&pwm3 0 46>; /* 22 MHz */
+		#clock-cells = <0>;
+	};
 };
 
 &audmux {
-- 
2.1.1

regards
Philipp

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