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Message-Id: <1417077794-9299-69-git-send-email-lizf@kernel.org>
Date: Thu, 27 Nov 2014 16:42:52 +0800
From: lizf@...nel.org
To: stable@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, Robin Murphy <robin.murphy@....com>,
Russell King <rmk+kernel@....linux.org.uk>,
Zefan Li <lizefan@...wei.com>
Subject: [PATCH 3.4 69/91] ARM: 8165/1: alignment: don't break misaligned NEON load/store
From: Robin Murphy <robin.murphy@....com>
3.4.105-rc1 review patch. If anyone has any objections, please let me know.
------------------
commit 5ca918e5e3f9df4634077c06585c42bc6a8d699a upstream.
The alignment fixup incorrectly decodes faulting ARM VLDn/VSTn
instructions (where the optional alignment hint is given but incorrect)
as LDR/STR, leading to register corruption. Detect these and correctly
treat them as unhandled, so that userspace gets the fault it expects.
Reported-by: Simon Hosie <simon.hosie@....com>
Signed-off-by: Robin Murphy <robin.murphy@....com>
Signed-off-by: Russell King <rmk+kernel@....linux.org.uk>
Signed-off-by: Zefan Li <lizefan@...wei.com>
---
arch/arm/mm/alignment.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index fc000e3..17f4ea2 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -39,6 +39,7 @@
* This code is not portable to processors with late data abort handling.
*/
#define CODING_BITS(i) (i & 0x0e000000)
+#define COND_BITS(i) (i & 0xf0000000)
#define LDST_I_BIT(i) (i & (1 << 26)) /* Immediate constant */
#define LDST_P_BIT(i) (i & (1 << 24)) /* Preindex */
@@ -813,6 +814,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
break;
case 0x04000000: /* ldr or str immediate */
+ if (COND_BITS(instr) == 0xf0000000) /* NEON VLDn, VSTn */
+ goto bad;
offset.un = OFFSET_BITS(instr);
handler = do_alignment_ldrstr;
break;
--
1.9.1
--
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