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Message-ID: <20141127174925.53e9d7a6@thinkpad-w530>
Date: Thu, 27 Nov 2014 17:49:25 +0100
From: David Hildenbrand <dahi@...ux.vnet.ibm.com>
To: David Laight <David.Laight@...LAB.COM>
Cc: Thomas Gleixner <tglx@...utronix.de>,
"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
"Michael S. Tsirkin" <mst@...hat.com>,
"Heiko Carstens" <heiko.carstens@...ibm.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Christian Borntraeger <borntraeger@...ibm.com>,
"paulus@...ba.org" <paulus@...ba.org>,
"schwidefsky@...ibm.com" <schwidefsky@...ibm.com>,
"akpm@...ux-foundation.org" <akpm@...ux-foundation.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"mingo@...nel.org" <mingo@...nel.org>
Subject: Re: [RFC 0/2] Reenable might_sleep() checks for might_fault() when
atomic
> From: David Hildenbrand [mailto:dahi@...ux.vnet.ibm.com]
> > > From: David Hildenbrand
> > > ...
> > > > Although it might not be optimal, but keeping a separate counter for
> > > > pagefault_disable() as part of the preemption counter seems to be the only
> > > > doable thing right now. I am not sure if a completely separated counter is even
> > > > possible, increasing the size of thread_info.
> > >
> > > What about adding (say) 0x10000 for the more restrictive test?
> > >
> > > David
> > >
> >
> > You mean as part of the preempt counter?
> >
> > The current layout (on my branch) is
> >
> > * PREEMPT_MASK: 0x000000ff
> > * SOFTIRQ_MASK: 0x0000ff00
> > * HARDIRQ_MASK: 0x000f0000
> > * NMI_MASK: 0x00100000
> > * PREEMPT_ACTIVE: 0x00200000
> >
> > I would have added
> > * PAGEFAULT_MASK: 0x03C00000
>
> I'm not sure where you'd need to add the bits.
>
> I think the above works because disabling 'HARDIRQ' implicitly
> disables 'SOFTIRQ' and 'PREEMPT' (etc), so if 256+ threads
> disable PREEMPT everything still works.
AFAIK 256+ levels of preempt will break the system :)
Therefore with CONFIG_DEBUG_PREEMPT we verify that we don't have any
over/underflows.
But such bugs can only be found with CONFIG_DEBUG_PREEMPT enabled.
>
> So if disabling pagefaults implies that pre-emption is disabled
> (but SOFTIRQ is still allowed) then you need to insert your bit(s)
> between 0xff00 and 0x00ff.
> OTOH if disabling pre-emption implies that pagefaults are disabled
> then you'd need to use the lsb and change all the above values.
>
> Which makes me think that 'PREEMPT_ACTIVE' isn't right at all.
> Two threads disabling NMIs (or 32 disabling HARDIRQ) won't DTRT.
With threads you mean levels? This is a per thread information.
>
> OTOH I'm only guessing at how this is used.
>
> David
>
>
>
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