linux-kernel - Re: [PATCH v12 3/3] ARM: dts: add rk3288 power-domain node

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Message-ID: <5063652.5fn5DLTjuV@diego>
Date:	Fri, 28 Nov 2014 09:57:47 +0100
From:	Heiko Stübner <heiko@...ech.de>
To:	Caesar Wang <caesar.wang@...k-chips.com>, khilman@...nel.org
Cc:	linus.walleij@...aro.org, linux-arm-kernel@...ts.infradead.org,
	Russell King <linux@....linux.org.uk>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Grant Likely <grant.likely@...aro.org>,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	Randy Dunlap <rdunlap@...radead.org>,
	linux-doc@...r.kernel.org, dianders@...omium.org,
	linux-rockchip@...ts.infradead.org,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Dmitry Torokhov <dmitry.torokhov@...il.com>,
	fzf@...k-chips.com, cf@...k-chips.com, chris.zhong@...k-chips.com,
	xxm@...k-chips.com, chm@...k-chips.com, djkurtz@...omium.org,
	Jack Dai <jack.dai@...k-chips.com>,
	"jinkun.hong" <jinkun.hong@...k-chips.com>
Subject: Re: [PATCH v12 3/3] ARM: dts: add rk3288 power-domain node

Hi Caesar,

Am Montag, 17. November 2014, 17:50:41 schrieb Caesar Wang:
> This patch add the needed clocks into power-controller.
> 
> why need we do so that?
> 
> Firstly, we always be needed turn off clocks to save power when
> the system enter suspend.So we need to enumerate the clocks are needed
> to switch power doamin no and off.
> 
> Secondly, Rk3288 reset circuit should be syncchronous reset and
> then sync revoked.so we need to enable clocks of all devices.
> 
> Signed-off-by: Jack Dai <jack.dai@...k-chips.com>
> Signed-off-by: jinkun.hong <jinkun.hong@...k-chips.com>
> Signed-off-by: Caesar Wang <caesar.wang@...k-chips.com>
> 
> ---
> 
> Changes in v12:
>     - Remove essential clocks from rk3288 PD_VIO domain,
>       Some clocks are essential for the system health and should not be
>       turned down. However there is no owner for them so if they listed as
>       belonging to power domain we'll try toggling them up and down during
>       power domain transition. As a result we either fail to suspend or
> resume the system.
> 
> Changes in v11: None
> Changes in v10:
>     - fix missing the #include <dt-bindings/power-domain/rk3288.h>
>     - remove the notes
> 
> Changes in v9:
>     - add decription for power-doamin node
> 
> Changes in v8:
>     - DTS go back to v2
> 
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3:
>     - Decomposition power-controller, changed to multiple controller
>     (gpu-power-controller, hevc-power-controller)
> 
> Changes in v2:
>     - make pd_vio clocks all one entry per line and alphabetize.
>     - power: power-controller move back to pinctrl: pinctrl.
> 
>  arch/arm/boot/dts/rk3288.dtsi | 59
> +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59
> insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index cb18bb4..d9cd8c0 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -15,6 +15,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/pinctrl/rockchip.h>
>  #include <dt-bindings/clock/rk3288-cru.h>
> +#include <dt-bindings/power-domain/rk3288.h>
>  #include "skeleton.dtsi"
> 
>  / {
> @@ -989,4 +990,62 @@
>  			};
>  		};
>  	};
> +
> +	power: power-controller {
> +		compatible = "rockchip,rk3288-power-controller";
> +		#power-domain-cells = <1>;
> +		rockchip,pmu = <&pmu>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		pd_gpu {
> +			reg = <RK3288_PD_GPU>;
> +			clocks = <&cru ACLK_GPU>;
> +		};
> +
> +		pd_hevc {
> +			reg = <RK3288_PD_HEVC>;
> +			clocks = <&cru ACLK_HEVC>,
> +				 <&cru SCLK_HEVC_CABAC>,
> +				 <&cru SCLK_HEVC_CORE>,
> +				 <&cru HCLK_HEVC>;
> +		};
> +
> +		pd_vio {
> +			reg = <RK3288_PD_VIO>;
> +			clocks = <&cru ACLK_IEP>,
> +				 <&cru ACLK_ISP>,
> +				 <&cru ACLK_RGA>,
> +				 <&cru ACLK_VIP>,
> +				 <&cru ACLK_VOP0>,
> +				 <&cru ACLK_VOP1>,
> +				 <&cru DCLK_VOP0>,
> +				 <&cru DCLK_VOP1>,
> +				 <&cru HCLK_IEP>,
> +				 <&cru HCLK_ISP>,
> +				 <&cru HCLK_RGA>,
> +				 <&cru HCLK_VIP>,
> +				 <&cru HCLK_VOP0>,
> +				 <&cru HCLK_VOP1>,
> +				 <&cru PCLK_EDP_CTRL>,
> +				 <&cru PCLK_HDMI_CTRL>,
> +				 <&cru PCLK_LVDS_PHY>,
> +				 <&cru PCLK_MIPI_CSI>,
> +				 <&cru PCLK_MIPI_DSI0>,
> +				 <&cru PCLK_MIPI_DSI1>,
> +				 <&cru SCLK_EDP_24M>,
> +				 <&cru SCLK_EDP>,
> +				 <&cru SCLK_HDMI_CEC>,
> +				 <&cru SCLK_HDMI_HDCP>,
> +				 <&cru SCLK_ISP_JPE>,
> +				 <&cru SCLK_ISP>,
> +				 <&cru SCLK_RGA>;
> +		};
> +
> +		pd_video {
> +			reg = <RK3288_PD_VIDEO>;
> +			clocks = <&cru ACLK_VCODEC>,
> +				 <&cru HCLK_VCODEC>;
> +		};
> +	};
>  };
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