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Message-ID: <20141201124651.GA12068@x1>
Date: Mon, 1 Dec 2014 12:46:51 +0000
From: Lee Jones <lee.jones@...aro.org>
To: micky_ching@...lsil.com.cn
Cc: sameo@...ux.intel.com, chris@...ntf.net, ulf.hansson@...aro.org,
devel@...uxdriverproject.org, linux-kernel@...r.kernel.org,
linux-mmc@...r.kernel.org, gregkh@...uxfoundation.org,
dan.carpenter@...cle.com, rogerable@...ltek.com,
wei_wang@...lsil.com.cn
Subject: Re: [PATCH v2 1/2] mfd: rtsx: add func to split u32 into register
On Fri, 28 Nov 2014, micky_ching@...lsil.com.cn wrote:
> From: Micky Ching <micky_ching@...lsil.com.cn>
>
> Add helper function to write u32 to registers, if we want to put u32
> value to 4 continuous register, this can help us reduce tedious work.
>
> Signed-off-by: Micky Ching <micky_ching@...lsil.com.cn>
> ---
> include/linux/mfd/rtsx_pci.h | 9 +++++++++
> 1 file changed, 9 insertions(+)
Looks fine to me. Let me know how you want to handle this:
For my own reference:
Acked-by: Lee Jones <lee.jones@...aro.org>
> diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
> index 74346d5..9234449 100644
> --- a/include/linux/mfd/rtsx_pci.h
> +++ b/include/linux/mfd/rtsx_pci.h
> @@ -558,6 +558,7 @@
> #define SD_SAMPLE_POINT_CTL 0xFDA7
> #define SD_PUSH_POINT_CTL 0xFDA8
> #define SD_CMD0 0xFDA9
> +#define SD_CMD_START 0x40
> #define SD_CMD1 0xFDAA
> #define SD_CMD2 0xFDAB
> #define SD_CMD3 0xFDAC
> @@ -967,4 +968,12 @@ static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr)
> return (u8 *)(pcr->host_cmds_ptr);
> }
>
> +static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
> +{
> + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24);
> + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
> + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);
> + rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
> +}
> +
> #endif
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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