linux-kernel - [PATCH 0/3] MIPS: Get ready for non-executable stack.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <1417650258-2811-1-git-send-email-ddaney.cavm@gmail.com>
Date:	Wed,  3 Dec 2014 15:44:15 -0800
From:	David Daney <ddaney.cavm@...il.com>
To:	linux-mips@...ux-mips.org, ralf@...ux-mips.org
Cc:	Leonid Yegoshin <Leonid.Yegoshin@...tec.com>,
	Zubair.Kakakhel@...tec.com, geert+renesas@...der.be,
	peterz@...radead.org, paul.gortmaker@...driver.com,
	macro@...ux-mips.org, chenhc@...ote.com, cl@...ux.com,
	mingo@...nel.org, richard@....at, zajec5@...il.com,
	james.hogan@...tec.com, keescook@...omium.org, tj@...nel.org,
	alex@...x-smith.me.uk, pbonzini@...hat.com, blogic@...nwrt.org,
	paul.burton@...tec.com, qais.yousef@...tec.com,
	linux-kernel@...r.kernel.org, markos.chandras@...tec.com,
	dengcheng.zhu@...tec.com, manuel.lauss@...il.com,
	lars.persson@...s.com, David Daney <david.daney@...ium.com>
Subject: [PATCH 0/3] MIPS: Get ready for non-executable stack.

From: David Daney <david.daney@...ium.com>

Currently the MIPS FPU emulator uses eXecute Out of Line (XOL) on the
stack to handle instructions in the delay slots of FPU branches.
Because of this MIPS cannot have a non-executable stack.

A previous patch set from Leonid Yegoshin attempts to address the
problem by moving the XOL location to a thread private mapping of a
dedicated page.

I present here an alternative: Add an instruction set emulator and use
it to execute the FPU delay slot instructions.  The benefit of this
approach is that we don't have to allocate a page per user-space
thread for XOL, and we keep the TLB handling code slightly simpler as
a result.

Currently this is a proof of concept, as it doesn't yet handle MIPS64
nor microMIPS instructions.  But it is sufficient to run the entire
Debian distribution on a FPU-less CPU.

Comments welcome.

David Daney (3):
  MIPS: Add FPU emulator counter for non-FPU instructions emulated.
  MIPS: Add full ISA emulator.
  MIPS: Use full instruction emulation for FPU emulator delay slot
    emulation.

 arch/mips/include/asm/fpu_emulator.h |   1 +
 arch/mips/kernel/Makefile            |   3 +-
 arch/mips/kernel/insn-emul.c         | 815 +++++++++++++++++++++++++++++++++++
 arch/mips/math-emu/cp1emu.c          |  13 +-
 arch/mips/math-emu/me-debugfs.c      |   1 +
 5 files changed, 830 insertions(+), 3 deletions(-)
 create mode 100644 arch/mips/kernel/insn-emul.c

-- 
1.7.11.7

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/