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Message-ID: <CAAVeFuKf4d7i6sNhbAVdN4ZiZKYXrkW5nzftEdE+3PGVO6=oxw@mail.gmail.com>
Date: Thu, 4 Dec 2014 17:45:11 +0900
From: Alexandre Courbot <gnurou@...il.com>
To: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@...el.com>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
GPIO Subsystem Mailing List <linux-gpio@...r.kernel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Mika Westerberg <mika.westerberg@...el.com>,
Denis Turischev <denis.turischev@...pulab.co.il>
Subject: Re: [PATCHv4 2/3] gpio: sch: Add support for Intel Quark X1000 SoC
On Wed, Nov 26, 2014 at 1:47 PM, Chang Rebecca Swee Fun
<rebecca.swee.fun.chang@...el.com> wrote:
> Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between
> the legacy I/O bridge and the GPIO controller.
>
> GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC.
> Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from
> the suspend power well.
>
> This piece of work is derived from Dan O'Donovan's initial work for Quark
> X1000 enabling.
>
> Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@...el.com>
> Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
Reviewed-by: Alexandre Courbot <acourbot@...dia.com>
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