linux-kernel - Re: [PATCH v2 1/3] i2c: cadence: Handle

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Date:	Fri, 5 Dec 2014 11:27:01 +0530
From:	Harini Katakam <harinikatakamlinux@...il.com>
To:	rajeev kumar <rajeevkumar.linux@...il.com>
Cc:	"wsa@...-dreams.de" <wsa@...-dreams.de>,
	Mark Rutland <mark.rutland@....com>,
	Michal Simek <michal.simek@...inx.com>,
	Sören Brinkmann <soren.brinkmann@...inx.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"vishnum@...inx.com" <vishnum@...inx.com>
Subject: Re: [PATCH v2 1/3] i2c: cadence: Handle > 252 byte transfers

Hi,

On Fri, Dec 5, 2014 at 11:11 AM, rajeev kumar
<rajeevkumar.linux@...il.com> wrote:
> On Wed, Dec 3, 2014 at 6:05 PM, Harini Katakam <harinik@...inx.com> wrote:
>> The I2C controller sends a NACK to the slave when transfer size register
>> reaches zero, irrespective of the hold bit. So, in order to handle transfers
>> greater than 252 bytes, the transfer size register has to be maintained at a
>> value >= 1. This patch implements the same.
>
> Why 252 Bytes ?  Is it word allign or what ?
>

It is the maximum transfer size that can be written that is a multiple of
the data interrupt (this occurs when the fifo has 14 bytes).
I will include an explanation in driver as well.

Regards,
Harini
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