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Message-ID: <CAPybu_1pZXcx9hbHN7_An1CsokWuLbaMbjN7hnFZyW-QNcmn=Q@mail.gmail.com>
Date: Wed, 10 Dec 2014 15:25:32 +0100
From: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
To: Michal Simek <michal.simek@...inx.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Alexandre Courbot <gnurou@...il.com>,
Sören Brinkmann <soren.brinkmann@...inx.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] gpio/xilinx: Remove offset property
Hello Michal
Thanks for the review
I wait for more comments and then I will resend the patchet with this
fixed. I guess is fine to add your reviewed-by?
Thanks!
On Wed, Dec 10, 2014 at 3:18 PM, Michal Simek <michal.simek@...inx.com> wrote:
> On 12/10/2014 02:21 PM, Ricardo Ribalda Delgado wrote:
>> Instead of calculating the register offset per call, pre-calculate it on
>> probe time.
>>
>> Acked-by: Alexandre Courbot <acourbot@...dia.com>
>> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
>> ---
>>
>> v2: Add Acked-by
>>
>> drivers/gpio/gpio-xilinx.c | 33 +++++++++++----------------------
>> 1 file changed, 11 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
>> index ba18b06..9483950 100644
>> --- a/drivers/gpio/gpio-xilinx.c
>> +++ b/drivers/gpio/gpio-xilinx.c
>> @@ -50,7 +50,6 @@ struct xgpio_instance {
>> struct of_mm_gpio_chip mmchip;
>> u32 gpio_state;
>> u32 gpio_dir;
>> - u32 offset;
>
> when you remove offset property you should also remove offset from comment
> above of this structure.
>
>> spinlock_t gpio_lock;
>> };
>>
>> @@ -65,12 +64,8 @@ struct xgpio_instance {
>> static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
>> {
>> struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
>> - struct xgpio_instance *chip =
>> - container_of(mm_gc, struct xgpio_instance, mmchip);
>>
>> - void __iomem *regs = mm_gc->regs + chip->offset;
>> -
>> - return !!(xgpio_readreg(regs + XGPIO_DATA_OFFSET) & BIT(gpio));
>> + return !!(xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET) & BIT(gpio));
>> }
>>
>> /**
>> @@ -88,7 +83,6 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
>> struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
>> struct xgpio_instance *chip =
>> container_of(mm_gc, struct xgpio_instance, mmchip);
>> - void __iomem *regs = mm_gc->regs;
>>
>> spin_lock_irqsave(&chip->gpio_lock, flags);
>>
>> @@ -98,8 +92,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
>> else
>> chip->gpio_state &= ~BIT(gpio);
>>
>> - xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
>> - chip->gpio_state);
>> + xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
>>
>> spin_unlock_irqrestore(&chip->gpio_lock, flags);
>> }
>> @@ -119,13 +112,12 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
>> struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
>> struct xgpio_instance *chip =
>> container_of(mm_gc, struct xgpio_instance, mmchip);
>> - void __iomem *regs = mm_gc->regs;
>>
>> spin_lock_irqsave(&chip->gpio_lock, flags);
>>
>> /* Set the GPIO bit in shadow register and set direction as input */
>> chip->gpio_dir |= BIT(gpio);
>> - xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
>> + xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
>>
>> spin_unlock_irqrestore(&chip->gpio_lock, flags);
>>
>> @@ -148,7 +140,6 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
>> struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
>> struct xgpio_instance *chip =
>> container_of(mm_gc, struct xgpio_instance, mmchip);
>> - void __iomem *regs = mm_gc->regs;
>>
>> spin_lock_irqsave(&chip->gpio_lock, flags);
>>
>> @@ -157,12 +148,11 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
>> chip->gpio_state |= BIT(gpio);
>> else
>> chip->gpio_state &= ~BIT(gpio);
>> - xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
>> - chip->gpio_state);
>> + xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
>>
>> /* Clear the GPIO bit in shadow register and set direction as output */
>> chip->gpio_dir &= ~BIT(gpio);
>> - xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
>> + xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
>>
>> spin_unlock_irqrestore(&chip->gpio_lock, flags);
>>
>> @@ -178,10 +168,8 @@ static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
>> struct xgpio_instance *chip =
>> container_of(mm_gc, struct xgpio_instance, mmchip);
>>
>> - xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_DATA_OFFSET,
>> - chip->gpio_state);
>> - xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_TRI_OFFSET,
>> - chip->gpio_dir);
>> + xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
>> + xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
>> }
>>
>> /**
>> @@ -247,9 +235,6 @@ static int xgpio_of_probe(struct device_node *np)
>> if (!chip)
>> return -ENOMEM;
>>
>> - /* Add dual channel offset */
>> - chip->offset = XGPIO_CHANNEL_OFFSET;
>> -
>> /* Update GPIO state shadow register with default value */
>> of_property_read_u32(np, "xlnx,dout-default-2",
>> &chip->gpio_state);
>> @@ -285,6 +270,10 @@ static int xgpio_of_probe(struct device_node *np)
>> np->full_name, status);
>> return status;
>> }
>> +
>> + /* Add dual channel offset */
>> + chip->mmchip.regs += XGPIO_CHANNEL_OFFSET;
>> +
>> pr_info("XGpio: %s: dual channel registered, base is %d\n",
>> np->full_name, chip->mmchip.gc.base);
>> }
>>
>
> Thanks,
> Michal
--
Ricardo Ribalda
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