lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7hlhmfo1b0.fsf@deeprootsystems.com>
Date:	Wed, 10 Dec 2014 09:35:31 -0800
From:	Kevin Hilman <khilman@...nel.org>
To:	Sylwester Nawrocki <s.nawrocki@...sung.com>
Cc:	Krzysztof Kozlowski <k.kozlowski@...sung.com>,
	Mike Turquette <mturquette@...aro.org>,
	Tomasz Figa <tomasz.figa@...il.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Kukjin Kim <kgene@...nel.org>,
	linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Javier Martinez Canillas <javier.martinez@...labora.co.uk>,
	Kyungmin Park <kyungmin.park@...sung.com>,
	Marek Szyprowski <m.szyprowski@...sung.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>
Subject: Re: [PATCH] clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated

Sylwester Nawrocki <s.nawrocki@...sung.com> writes:

> On 09/12/14 13:59, Krzysztof Kozlowski wrote:
>> On piÄ…, 2014-12-05 at 15:15 +0100, Krzysztof Kozlowski wrote:
>>> > Audio subsystem clocks are located in separate block. On Exynos 5420 if
>>> > clock for this block (from main clock domain) 'mau_epll' is gated then
>>> > any read or write to audss registers will block.
>>> > 
>>> > This kind of boot hang was observed on Arndale Octa and Peach Pi/Pit
>>> > after introducing runtime PM to pl330 DMA driver. After that commit the
>>> > 'mau_epll' was gated, because the "amba" clock was disabled and there
>>> > were no more users of mau_epll.
>>> > 
>>> > The system hang on one of steps:
>>> > 1. Disabling unused clocks from audss block.
>>> > 2. During audss GPIO setup (just before probing i2s0 because
>>> >    samsung_pinmux_setup() tried to access memory from audss block which was
>>> >    gated.
>>> > 
>>> > Add a workaround for this by enabling the 'mau_epll' clock in probe.
>>> > 
>>> > Signed-off-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
>>> > ---
>>> >  drivers/clk/samsung/clk-exynos-audss.c | 29 ++++++++++++++++++++++++++++-
>>> >  1 file changed, 28 insertions(+), 1 deletion(-)
>>
>> Sorry for pinging so quick but merge window is open and it looks like
>> booting Exynos542x boards will be broken (because pl330 will no longer
>> hold adma clock enabled so whole audss domain will be gated).
>> 
>> This is a non-intrusive workaround for that issue, as wanted by
>> Sylwester:
>> https://lkml.org/lkml/2014/12/5/223
>> 
>> Any comments on this?
>
> The patch looks OK to me, it would be good though if someone else
> has confirmed it fixes the bug. I don't have any clock patches queued
> at the moment. Perhaps you could apply it directly, Mike ?

I confirm it fixes the boot hang in linux-next (next-20141210) on my
exynos5800-peach-pi and exynos5420-arndale-octa.  Tested both
exynos_defconfig and multi_v7_defconfig.

Tested-by: Kevin Hilman <khilman@...aro.org>

Kevin
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ