lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAD=FV=URDM5yH-t6kRvq=70v3OM=a7z6TesBrzqGZ9m-oxf+qg@mail.gmail.com>
Date:	Thu, 11 Dec 2014 10:46:12 -0800
From:	Doug Anderson <dianders@...omium.org>
To:	Yunzhi Li <lyz@...k-chips.com>
Cc:	Heiko Stübner <heiko@...ech.de>,
	jwerner@...omium.org, Olof Johansson <olof@...om.net>,
	Tao Huang <huangtao@...k-chips.com>,
	Chris <zyw@...k-chips.com>, Eddie Cai <cf@...k-chips.com>,
	"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 2/5] Documentation: bindings: add dt documentation for
 Rockchip usb PHY

Yunzhi,

On Thu, Dec 11, 2014 at 1:55 AM, Yunzhi Li <lyz@...k-chips.com> wrote:
> This patch adds a binding that describes the Rockchip usb PHYs
> found on Rockchip SoCs usb interface.

Technically the bindings patch is supposed to come before the driver.
So this should be patch #1 and the driver patch #2.


> +Required properties:
> + - compatible: rockchip,rk3288-usb-phy
> + - rockchip,grf : phandle to the syscon managing the "general
> +   register files"
> + - #phy-cells: should be 1
> + - #address-cells: should be 1
> + - #size-cells: should be 0
> +
> +Sub-nodes:
> +Each PHY should be represented as a sub-node.
> +
> +Sub-nodes
> +required properties:
> +- reg: the PHY number
> +               "0" - PHY connect to OTG controller
> +               "1" - PHY connect to HOST0 controller
> +               "2" - PHY connect to HOST1 controller

You don't have any sub nodes and are using the phy-cells.  Seems like
you should get rid of this?  ...or I guess switch to using sub nodes
and set "phy-cells" to 0?

> +
> +Optional Properties:
> +- clocks : phandle + clock specifier for the phy clocks

As per earlier, you should get rid of clocks.  If you really want a
clock here and it's optional:

* Back in the driver it shouldn't be a "warn".  You don't warn when
optional things are missing.

* You really should specify a clock name.  Right now this will pick
the first clock, which makes it hard to later add clocks.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ