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Message-ID: <6cfe4d79d058475282c1ed8b1ac15852@BN1AFFO11FD035.protection.gbl>
Date:	Fri, 19 Dec 2014 08:30:53 +0100
From:	Michal Simek <michal.simek@...inx.com>
To:	atull <atull@...nsource.altera.com>,
	Michal Simek <michal.simek@...inx.com>
CC:	<gregkh@...uxfoundation.org>, <jgunthorpe@...idianresearch.com>,
	<hpa@...or.com>, <monstr@...str.eu>, <rdunlap@...radead.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<pantelis.antoniou@...sulko.com>, <robh+dt@...nel.org>,
	<grant.likely@...aro.org>, <iws@...o.caltech.edu>,
	<linux-doc@...r.kernel.org>, <pavel@...x.de>, <broonie@...nel.org>,
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	<s.trumtrar@...gutronix.de>, <jason@...edaemon.net>,
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	<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>,
	<galak@...eaurora.org>, <devel@...verdev.osuosl.org>,
	<delicious.quinoa@...il.com>, <dinguyen@...nsource.altera.com>,
	<yvanderv@...nsource.altera.com>
Subject: Re: [PATCH v5 4/6] staging: fpga manager: add driver for socfpga
 fpga manager

On 12/18/2014 09:59 PM, atull wrote:
> On Thu, 18 Dec 2014, Michal Simek wrote:
> 
> Hi Michal,
> 
>>> +
>>> +	/* Write out remaining non 32-bit chunks. */
>>> +	switch (count) {
>>> +	case 3:
>>> +		socfpga_fpga_data_writel(priv, buffer_32[i++] & 0x00ffffff);
>>> +		break;
>>> +	case 2:
>>> +		socfpga_fpga_data_writel(priv, buffer_32[i++] & 0x0000ffff);
>>> +		break;
>>> +	case 1:
>>> +		socfpga_fpga_data_writel(priv, buffer_32[i++] & 0x000000ff);
>>> +		break;
>>> +	default:
>>> +		/* This will never happen. */
>>
>> why not just return any error code here even if this can't happen.
>>
> 
> OK. Will be in v6.
> 
>>
>> add it to one line.
>>
>> The rest is looks good to me. I think this is good to go in.
>>
>> Acked-by: Michal Simek <michal.simek@...inx.com>
>>
>> Thanks,
>> Michal
>>
> 
> Thanks for the feedback.  So patches 1-4 look good now?

Will look at them.

M

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