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Message-ID: <CABuKBeJ-bBiJSbh9jKH1+T2MhKCjxnkryStrhG_kFX7HuBnevQ@mail.gmail.com>
Date:	Fri, 2 Jan 2015 11:23:36 +0100
From:	Matthias Brugger <matthias.bgg@...il.com>
To:	Eddie Huang <eddie.huang@...iatek.com>
Cc:	Rob Herring <robh+dt@...nel.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	Jiri Slaby <jslaby@...e.cz>, Alan Cox <alan@...ux.intel.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	linux-serial@...r.kernel.org,
	YH Chen (陳昱豪) <yh.chen@...iatek.com>,
	HC Yen <hc.yen@...iatek.com>,
	Nathan Chung <nathan.chung@...iatek.com>,
	srv_heupstream <srv_heupstream@...iatek.com>,
	Sascha Hauer <kernel@...gutronix.de>
Subject: Re: [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135

2014-10-22 15:12 GMT+02:00 Eddie Huang <eddie.huang@...iatek.com>:
> This add dts support for mt8127 and mt8135 SOC UART
>
> Signed-off-by: Eddie Huang <eddie.huang@...iatek.com>
> ---
>  arch/arm/boot/dts/mt8127.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  arch/arm/boot/dts/mt8135.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>  2 files changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
> index 25c9f69..249c218 100644
> --- a/arch/arm/boot/dts/mt8127.dtsi
> +++ b/arch/arm/boot/dts/mt8127.dtsi
> @@ -64,6 +64,12 @@
>                         clock-frequency = <32000>;
>                         #clock-cells = <0>;
>                 };
> +
> +               uart_clk: dummy26m {
> +                       compatible = "fixed-clock";
> +                       clock-frequency = <26000000>;
> +                       #clock-cells = <0>;
> +                };
>         };
>
>         soc {
> @@ -89,5 +95,33 @@
>                               <0 0x10214000 0 0x2000>,
>                               <0 0x10216000 0 0x2000>;
>                 };
> +
> +               uart0: serial@...06000 {
> +                       compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11002000 0 0x400>;
> +                       interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
> +               uart1: serial@...07000 {
> +                       compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11003000 0 0x400>;
> +                       interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
> +               uart2: serial@...08000 {
> +                       compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11004000 0 0x400>;
> +                       interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
> +               uart3: serial@...09000 {
> +                       compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11005000 0 0x400>;
> +                       interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
>         };
>  };
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 90a56ad..683b761 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -86,6 +86,13 @@
>                         clock-frequency = <32000>;
>                         #clock-cells = <0>;
>                 };
> +
> +               uart_clk: dummy26m {
> +                       compatible = "fixed-clock";
> +                       clock-frequency = <26000000>;
> +                       #clock-cells = <0>;
> +               };
> +
>         };
>
>         soc {
> @@ -111,5 +118,34 @@
>                               <0 0x10214000 0 0x2000>,
>                               <0 0x10216000 0 0x2000>;
>                 };
> +
> +               uart0: serial@...06000 {
> +                       compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11006000 0 0x400>;
> +                       interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
> +               uart1: serial@...07000 {
> +                       compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11007000 0 0x400>;
> +                       interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
> +               uart2: serial@...08000 {
> +                       compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11008000 0 0x400>;
> +                       interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
> +               uart3: serial@...09000 {
> +                       compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> +                       reg = <0 0x11009000 0 0x400>;
> +                       interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&uart_clk>;
> +               };
> +
>         };
>  };
> --
> 1.8.1.1.dirty
>

Applied to v3.20-next/dts, thanks.

-- 
motzblog.wordpress.com
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