[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20150107193607.GJ9759@ld-irv-0074>
Date: Wed, 7 Jan 2015 11:36:07 -0800
From: Brian Norris <computersforpeace@...il.com>
To: Bean Huo 霍斌斌 (beanhuo)
<beanhuo@...ron.com>
Cc: Marek Vasut <marex@...x.de>,
"dwmw2@...radead.org" <dwmw2@...radead.org>,
"shijie8@...il.com" <shijie8@...il.com>,
"geert+renesas@...der.be" <geert+renesas@...der.be>,
"grmoore@...era.com" <grmoore@...era.com>,
"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [V7 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for
Micron spi nor
On Wed, Dec 17, 2014 at 07:35:45AM +0000, Bean Huo 霍斌斌 (beanhuo) wrote:
> This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes.
>
> For Micron SPI NOR flash, enabling or disabling quad I/O protocol can be done
> By two methods, which are to use EVCR(Enhanced Volatile Configuration Register)
> and the ENTER QUAD I/O MODE command. There is no difference between these two
> methods. Unfortunately, for some Micron spi nor flashes, there no ENTER Quad I/O
> command(35h),such as n25q064.But for all current Micron spi nor, if it support
> quad I/O mode, using EVCR definitely be supported. It is a recommended method to
> enable Quad I/O mode by EVCR, Quad I/O protocol bit 7.When EVCR bit 7 is reset
> to 0,the SPI NOR flash will operate in quad I/O mode.
>
> This patch has been tested on N25Q512A and MT25TL256BAA1ESF.Micron spi nor of
> spi_nor_ids[] table all support this method.
>
> Signed-off-by: bean huo <beanhuo@...ron.com>
> Acked-by: Marek Vasut <marex@...x.de>
Pushed to l2-mtd.git. Thanks.
Brian
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists