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Message-Id: <1420723339-30735-10-git-send-email-mikko.perttunen@kapsi.fi>
Date: Thu, 8 Jan 2015 15:22:12 +0200
From: Mikko Perttunen <mikko.perttunen@...si.fi>
To: swarren@...dotorg.org, thierry.reding@...il.com, gnurou@...il.com,
pdeschrijver@...dia.com, rjw@...ysocki.net, viresh.kumar@...aro.org
Cc: mturquette@...aro.org, pwalmsley@...dia.com, vinceh@...dia.com,
pgaikwad@...dia.com, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, tuomas.tynkkynen@....fi,
Tuomas Tynkkynen <ttynkkynen@...dia.com>,
Mikko Perttunen <mikko.perttunen@...si.fi>
Subject: [PATCH v7 09/16] ARM: tegra: Add the DFLL to Tegra124 device tree
From: Tuomas Tynkkynen <ttynkkynen@...dia.com>
The DFLL clocksource is a separate IP block from the usual
clock-and-reset controller, so it gets its own device tree node.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@...dia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@...si.fi>
---
arch/arm/boot/dts/tegra124.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 4be06c6..c33a250 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -670,6 +670,28 @@
#thermal-sensor-cells = <1>;
};
+ dfll: dfll@0,70110000 {
+ compatible = "nvidia,tegra124-dfll";
+ reg = <0 0x70110000 0 0x100>, /* DFLL control */
+ <0 0x70110000 0 0x100>, /* I2C output control */
+ <0 0x70110100 0 0x100>, /* Integrated I2C controller */
+ <0 0x70110200 0 0x100>; /* Look-up table RAM */
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA124_CLK_DFLL_SOC>,
+ <&tegra_car TEGRA124_CLK_DFLL_REF>,
+ <&tegra_car TEGRA124_CLK_I2C5>;
+ clock-names = "soc", "ref", "i2c";
+ #clock-cells = <0>;
+ clock-output-names = "dfllCPU_out";
+ nvidia,sample-rate = <12500>;
+ nvidia,droop-ctrl = <0x00000f00>;
+ nvidia,force-mode = <1>;
+ nvidia,cf = <10>;
+ nvidia,ci = <0>;
+ nvidia,cg = <2>;
+ status = "disabled";
+ };
+
ahub@0,70300000 {
compatible = "nvidia,tegra124-ahub";
reg = <0x0 0x70300000 0x0 0x200>,
--
2.2.1
--
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